dblp.uni-trier.dewww.uni-trier.de

Amit Patra

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2009
24EESoumya Pandit, Chittaranjan A. Mandal, Amit Patra: Systematic Methodology for High-Level Performance Modeling of Analog Systems. VLSI Design 2009: 361-366
2008
23EEAmitava Banerjee, Subho Chatterjee, Amit Patra, Siddhartha Mukhopadhyay: An efficient approach to model distortion in weakly nonlinear Gm - C filters. ISCAS 2008: 1312-1315
22EESantanu Kapat, Amit Patra, Soumitro Banerjee: A novel current controlled tri-state boost converter with superior dynamic performance. ISCAS 2008: 2194-2197
21EERupam Mukherjee, Amit Patra, Soumitro Banerjee: Chaos-Modulated Ramp IC for EMI Reduction in PWM Buck Converters- Design and Analysis of Critical Issues. VLSI Design 2008: 305-310
20EEJyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei: A New Approach for Estimation of On-Resistance and Current Distribution in Power Array Layouts. VLSI Design 2008: 331-336
19EESushanta K. Mandal, Shamik Sural, Amit Patra: ANN- and PSO-Based Synthesis of On-Chip Spiral Inductors for RF ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 188-192 (2008)
18EESoumya Pandit, Sumit K. Bhattacharya, Chittaranjan A. Mandal, Amit Patra: A Fast Exploration Procedure for Analog High-Level Specification Translation. IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1493-1497 (2008)
2007
17EEPradipta Patra, Amit Patra, Debaprasad Kastha: On-chip implementation of a multi-output voltage regulator based on single inductor Buck Converter topology. VLSI Design 2007: 935-940
16EEAbhishek Somani, P. P. Chakrabarti, Amit Patra: An Evolutionary Algorithm-Based Approach to Automated Design of Analog and RF Circuits Using Adaptive Normalized Cost Functions. IEEE Trans. Evolutionary Computation 11(3): 336-353 (2007)
2006
15EESoumya Pandit, Chittaranjan A. Mandal, Amit Patra: A formal approach for high level synthesis of linear analog systems. ACM Great Lakes Symposium on VLSI 2006: 345-348
14EESoumya Pandit, Sougata Kar, Chittaranjan A. Mandal, Amit Patra: High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count. DATE 2006: 1203-1204
13EEAbhishek Somani, P. P. Chakrabarti, Amit Patra: A model-based hybrid evolutionary algorithm for fast yield-inclusive design space exploration of analog circuits. ISCAS 2006
12EESushanta K. Mandal, Arijit De, Amit Patra, Shamik Sural: A Wide-Band Lumped Element Compact CAD Model of Si-Based Planar Spiral Inductor for RFIC Design. VLSI Design 2006: 619-624
2005
11EESushanta K. Mandal, Arijit De, Amit Patra, Shamik Sural: A simple wide-band compact model and parameter extraction using particle swarm optimization of on-chip spiral inductors for silicon RFICs. ACM Great Lakes Symposium on VLSI 2005: 168-171
10 Rajarshi Paul, Faruk Nome, Amit Patra, Barry Culpepper: Trimming methodologies for compensating process variation errors in second-order bandgap voltage reference circuits. Circuits, Signals, and Systems 2005: 44-49
9EEAbhishek Somani, Partha Pratim Chakrabarti, Amit Patra: Mixing Global and Local Competition in Genetic Optimization based Design Space Exploration of Analog Circuits. DATE 2005: 1064-1069
8EEH. N. Nagaraja, Amit Patra, Debaprasad Kastha: Generalized analysis of integrated magnetic component based low voltage interleaved DC-DC buck converter for efficiency improvement. ISCAS (3) 2005: 2485-2489
7EEAbhijit Chatterjee, Ali Keshavarzi, Amit Patra, Siddhartha Mukhopadhyay: Test Methodologies in the Deep Submicron Era -- Analog, Mixed-Signal, and RF. VLSI Design 2005: 12-13
6EERajarshi Paul, Amit Patra, Shailendra Baranwal, Kaushik Dash: Design of Second-Order Sub-Bandgap Mixed-Mode Voltage Reference Circuit for Low Voltage Applications. VLSI Design 2005: 307-312
5EEAbhishek Somani, P. P. Chakrabarti, Amit Patra: A Hierarchical Cost Tree Mutation Approach to Optimization of Analog Circuits. VLSI Design 2005: 535-538
4EESantosh Biswas, Siddhartha Mukhopadhyay, Amit Patra: A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation. J. Electronic Testing 21(5): 503-537 (2005)
2004
3EESantosh Biswas, Siddhartha Mukhopadhyay, Amit Patra: A BIST Approach to On-Line Monitoring of Digital VLSI Circuits: A CAD Tool. Asian Test Symposium 2004: 184-189
2EESantosh Biswas, Siddhartha Mukhopadhyay, Amit Patra: Optimization of the Theory of FDD of DES for Alleviation of the State Explosion Problem and Development of CAD Tools for On-line Testing of Digital VLSI Circuits. IOLTS 2004: 184-
1EESantosh Biswas, Siddhartha Mukhopadhyay, Amit Patra: A discrete event systems approach to online testing of digital VLSI circuits. SMC (2) 2004: 1699-1704

Coauthor Index

1Amitava Banerjee [23]
2Soumitro Banerjee [21] [22]
3Shailendra Baranwal [6]
4Sumit K. Bhattacharya [18]
5Santosh Biswas [1] [2] [3] [4]
6P. P. Chakrabarti (Partha Pratim Chakrabarti) [5] [9] [13] [16]
7Abhijit Chatterjee [7]
8Subho Chatterjee [23]
9Barry Culpepper [10] [20]
10Kaushik Dash [6]
11Arijit De [11] [12]
12Jyotirmoy Ghosh [20]
13Santanu Kapat [22]
14Sougata Kar [14]
15Debaprasad Kastha [8] [17]
16Ali Keshavarzi [7]
17Chittaranjan A. Mandal (Chitta Mandal) [14] [15] [18] [24]
18Sushanta K. Mandal [11] [12] [19]
19Tawen Mei [20]
20Rupam Mukherjee [21]
21Siddhartha Mukhopadhyay [1] [2] [3] [4] [7] [20] [23]
22H. N. Nagaraja [8]
23Faruk Nome [10]
24Soumya Pandit [14] [15] [18] [24]
25Pradipta Patra [17]
26Rajarshi Paul [6] [10]
27Abhishek Somani [5] [9] [13] [16]
28Shamik Sural [11] [12] [19]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)