| 2007 |
|---|
| 7 | EE | Huaxing Tang,
Manish Sharma,
Janusz Rajski,
Martin Keim,
Brady Benware:
Analyzing Volume Diagnosis Results with Statistical Learning for Yield Improvement.
European Test Symposium 2007: 145-150 |
| 6 | EE | Wei Zou,
Wu-Tung Cheng,
Sudhakar M. Reddy,
Huaxing Tang:
Speeding Up Effect-Cause Defect Diagnosis Using a Small Dictionary.
VTS 2007: 225-230 |
| 2006 |
|---|
| 5 | EE | Wei Zou,
Wu-Tung Cheng,
Sudhakar M. Reddy,
Huaxing Tang:
On Methods to Improve Location Based Logic Diagnosis.
VLSI Design 2006: 181-187 |
| 2005 |
|---|
| 4 | EE | Huaxing Tang,
Gang Chen,
Sudhakar M. Reddy,
Chen Wang,
Janusz Rajski,
Irith Pomeranz:
Defect Aware Test Patterns.
DATE 2005: 450-455 |
| 3 | EE | Huaxing Tang,
Chen Wang,
Janusz Rajski,
Sudhakar M. Reddy,
Jerzy Tyszer,
Irith Pomeranz:
On Efficient X-Handling Using a Selective Compaction Scheme to Achieve High Test Response Compaction Ratios.
VLSI Design 2005: 59-64 |
| 2003 |
|---|
| 2 | EE | Huaxing Tang,
Sudhakar M. Reddy,
Irith Pomeranz:
On Reducing Test Data Volume and Test Application Time for Multiple Scan Chain Designs.
ITC 2003: 1079-1088 |
| 2002 |
|---|
| 1 | EE | Sudhakar M. Reddy,
Irith Pomeranz,
Huaxing Tang,
Seiji Kajihara,
Kozo Kinoshita:
On Testing of Interconnect Open Defects in Combinational Logic Circuits with Stems of Large Fanout.
ITC 2002: 83-89 |
