| 2009 |
|---|
| 6 | EE | Smita Krishnaswamy,
Stephen Plaza,
Igor L. Markov,
John P. Hayes:
Signature-Based SER Analysis and Design of Logic Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 74-86 (2009) |
| 2008 |
|---|
| 5 | EE | Smita Krishnaswamy,
Igor L. Markov,
John P. Hayes:
On the role of timing masking in reliable logic circuit design.
DAC 2008: 924-929 |
| 4 | EE | Smita Krishnaswamy,
George F. Viamontes,
Igor L. Markov,
John P. Hayes:
Probabilistic transfer matrices in symbolic reliability analysis of logic circuits.
ACM Trans. Design Autom. Electr. Syst. 13(1): (2008) |
| 2007 |
|---|
| 3 | EE | Smita Krishnaswamy,
Stephen Plaza,
Igor L. Markov,
John P. Hayes:
Enhancing design robustness with reliability-aware resynthesis and logic simulation.
ICCAD 2007: 149-154 |
| 2 | EE | Smita Krishnaswamy,
Igor L. Markov,
John P. Hayes:
Tracking Uncertainty with Probabilistic Logic Circuit Testing.
IEEE Design & Test of Computers 24(4): 312-321 (2007) |
| 2005 |
|---|
| 1 | EE | Smita Krishnaswamy,
George F. Viamontes,
Igor L. Markov,
John P. Hayes:
Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices.
DATE 2005: 282-287 |
