2007 | ||
---|---|---|
32 | EE | Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A. Vissers: Optimized Generation of Data-Path from C Codes for FPGAs CoRR abs/0710.4716: (2007) |
2005 | ||
31 | EE | Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A. Vissers: Optimized Generation of Data-Path from C Codes for FPGAs. DATE 2005: 112-117 |
30 | EE | Roman L. Lysecky, Kris Miller, Frank Vahid, Kees A. Vissers: Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only). FPGA 2005: 271 |
29 | Kristof Denolf, Adrian Chirila-Rus, Robert D. Turney, Paul R. Schumacher, Kees A. Vissers: Memory Efficient Design of an MPEG-4 Video Encoder for FPGAs. FPL 2005: 391-396 | |
28 | EE | Paul R. Schumacher, Kristof Denolf, Adrian Chirila-Rus, Robert D. Turney, Nick Fedele, Kees A. Vissers, Jan Bormans: A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications. ICIP (2) 2005: 886-889 |
27 | EE | Adrian Chirila-Rus, Kristof Denolf, Bart Vanhoof, Paul R. Schumacher, Kees A. Vissers: Communication Primitives Driven Hardware Design and Test Methodology Applied on Complex Video Applications. IEEE International Workshop on Rapid System Prototyping 2005: 246-249 |
26 | EE | Mihai Sima, Sorin Cotofana, Jos T. J. van Eijndhoven, Stamatis Vassiliadis, Kees A. Vissers: IEEE-Compliant IDCT on FPGA-Augmented TriMedia. VLSI Signal Processing 39(3): 195-212 (2005) |
2004 | ||
25 | EE | Kees A. Vissers: Programming models and architectures for FPGA platforms. CASES 2004: 1 |
24 | EE | Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vissers: A quantitative analysis of the speedup factors of FPGAs over processors. FPGA 2004: 162-170 |
23 | EE | Kees A. Vissers: Programming Extremely Flexible Platforms. SAMOS 2004: 191 |
22 | EE | Mihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: Pel reconstruction on FPGA-augmented TriMedia. IEEE Trans. VLSI Syst. 12(6): 622-635 (2004) |
2003 | ||
21 | EE | Reinaldo A. Bergamaschi, Grant Martin, Wayne Wolf, Rolf Ernst, Kees A. Vissers, Jack Kouloheris: The future of system-level design: can we find the right solutions to the right problems at the right time? CODES+ISSS 2003: 231 |
20 | EE | Kees A. Vissers: Parallel Processing Architectures for Reconfigurable Systems. DATE 2003: 10396-10397 |
19 | EE | Wolfgang Rosenstiel, Rudy Lauwereins, Ivo Bolsens, Chris Rowen, Yankin Tanurhan, Kees A. Vissers, S. Wang: Panel Title: Reconfigurable Computing - Different Perspectives. DATE 2003: 10476-10477 |
2002 | ||
18 | EE | Bart Kienhuis, Ed F. Deprettere, Pieter van der Wolf, Kees A. Vissers: A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach. Embedded Processor Design Challenges 2002: 18-37 |
17 | EE | Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study. Embedded Processor Design Challenges 2002: 224-241 |
16 | EE | Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64. FCCM 2002: 261- |
15 | EE | Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven, Kees A. Vissers: Field-Programmable Custom Computing Machines - A Taxonomy -. FPL 2002: 79-88 |
14 | EE | Andrew Mihal, Chidamber Kulkarni, Matthew W. Moskewicz, Mel M. Tsai, Niraj Shah, Scott J. Weber, Yujia Jin, Kurt Keutzer, Christian Sauer, Kees A. Vissers, Sharad Malik: Developing Architectural Platforms: A Disciplined Approach. IEEE Design & Test of Computers 19(6): 6-16 (2002) |
2001 | ||
13 | Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor. ICCD 2001: 425-430 | |
12 | EE | Paul Lieverse, Pieter van der Wolf, Kees A. Vissers, Ed F. Deprettere: A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems. VLSI Signal Processing 29(3): 197-207 (2001) |
2000 | ||
11 | EE | Erwin A. de Kock, W. J. M. Smits, Pieter van der Wolf, Jean-Yves Brunel, W. M. Kruijtzer, Paul Lieverse, Kees A. Vissers, Gerben Essink: YAPI: application modeling for signal processing systems. DAC 2000: 402-405 |
10 | EE | Rolf Ernst, Grant Martin, Oz Levia, Pierre G. Paulin, Stamatis Vassiliadis, Kees A. Vissers: The Future of Flexible HW Platform Architectures Panel Discussion. DATE 2000: 634- |
1999 | ||
9 | EE | Pieter van der Wolf, Paul Lieverse, Mudit Goel, David La Hei, Kees A. Vissers: An MPEG-2 decoder case study as a driver for a system level design methodology. CODES 1999: 33-37 |
8 | EE | Rolf Ernst, Kees A. Vissers, Pieter van der Wolf, Gert-Jan van Rootselaar: System level design and debug of high-performance embedded media systems (tutorial). ICCAD 1999: 461 |
7 | EE | A. K. Riemens, Kees A. Vissers, R. J. Schutten, Gerben J. Hekstra, G. D. La Hei, Frans Sijstermans: TriMedia CPU64 Application Domain and Benchmark Suite. ICCD 1999: 580-585 |
6 | EE | Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-Jan D. Pol, P. Struik, R. H. J. Bloks, Pieter van der Wolf, Harald P. E. Vranken, Frans Sijstermans, M. J. A. Tromp, Andy D. Pimentel: TriMedia CPU64 Architecture. ICCD 1999: 586-592 |
1998 | ||
5 | EE | Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf: The construction of a retargetable simulator for an architecture template. CODES 1998: 125-129 |
1997 | ||
4 | EE | Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf: An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures. ASAP 1997: 338-349 |
3 | EE | Kees A. Vissers: Trade-offs in the design of mixed hardware-software systems-a perspective from industry. CODES 1997: 65-68 |
1991 | ||
2 | Gerben Essink, Emile H. L. Aarts, R. van Dongen, P. van Gerwen, Jan H. M. Korst, Kees A. Vissers: Scheduling in Programmable Video Signal Processors. ICCAD 1991: 284-287 | |
1 | EE | Gerben Essink, Emile H. L. Aarts, R. van Dongen, P. van Gerwen, Jan H. M. Korst, Kees A. Vissers: Architecture and Programming of a VLIW Style Programmable Video Signal Processor. MICRO 1991: 181-188 |