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Ilia Polian

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2009
48EEKunal P. Ganeshpure, Ilia Polian, Sandip Kundu, Bernd Becker: Reducing temperature variability by routing heat pipes. ACM Great Lakes Symposium on VLSI 2009: 63-68
47EEAlejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker: TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis. VLSI Design 2009: 227-232
2008
46EEPiet Engelke, Ilia Polian, Jürgen Schlöffel, Bernd Becker: Resistive Bridging Fault Simulation of Industrial Circuits. DATE 2008: 628-633
45EEIlia Polian, Kohei Miyase, Yusuke Nakamura, Seiji Kajihara, Piet Engelke, Bernd Becker, Stefan Spinner, Xiaoqing Wen: Diagnosis of Realistic Defects Based on the X-Fault Model. DDECS 2008: 263-266
44EEIlia Polian, Sudhakar M. Reddy, Irith Pomeranz, Xun Tang, Bernd Becker: On Reducing Circuit Malfunctions Caused by Soft Errors. DFT 2008: 245-253
43EEIlia Polian, Wenjing Rao: Selective Hardening of NanoPLA Circuits. DFT 2008: 263-271
42EEDamian Nowroth, Ilia Polian, Bernd Becker: A study of cognitive resilience in a JPEG compressor. DSN 2008: 32-41
41EEIlia Polian, Sudhakar M. Reddy, Bernd Becker: Scalable Calculation of Logical Masking Effects for Selective Hardening Against Soft Errors. ISVLSI 2008: 257-262
40EEStefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng: Automatic Test Pattern Generation for Interconnect Open Defects. VTS 2008: 181-186
39EEPiet Engelke, Ilia Polian, Michel Renovell, Sandip Kundu, Bharath Seshadri, Bernd Becker: On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 327-338 (2008)
2007
38EEIlia Polian, Damian Nowroth, Bernd Becker: Identification of Critical Errors in Imaging Applications. IOLTS 2007: 201-202
37EEJohn P. Hayes, Ilia Polian, Bernd Becker: An Analysis Framework for Transient-Error Tolerance. VTS 2007: 249-255
36EEIlia Polian, Alejandro Czutro, Bernd Becker: Evolutionary Optimization in Code-Based Test Compression CoRR abs/0710.4670: (2007)
35EEStefan Spinner, J. Bartholomeyczik, Bernd Becker, M. Doelle, O. Paul, Ilia Polian, R. Roth, K. Seitz, P. Ruther: Electromechanical Reliability Testing of Three-Axial Silicon Force Sensors CoRR abs/0711.3289: (2007)
34EEIlia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker: Power Droop Testing. IEEE Design & Test of Computers 24(3): 276-284 (2007)
33EEIlia Polian, Hideo Fujiwara: Functional Constraints vs. Test Compression in Scan-Based Delay Testing. J. Electronic Testing 23(5): 445-455 (2007)
2006
32EEIlia Polian, Hideo Fujiwara: Functional constraints vs. test compression in scan-based delay testing. DATE 2006: 1039-1044
31 Jochen Eisinger, Ilia Polian, Bernd Becker, Alexander Metzner, Stephan Thesing, Reinhard Wilhelm: Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis. DDECS 2006: 15-20
30EEIlia Polian, Bernd Becker, Masato Nakasato, Satoshi Ohtake, Hideo Fujiwara: Low-Cost Hardening of Image Processing Applications Against Soft Errors. DFT 2006: 274-279
29EEIlia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker: Power Droop Testing. ICCD 2006
28EESandip Kundu, Ilia Polian: An Improved Technique for Reducing False Alarms Due to Soft Errors. IOLTS 2006: 105-110
27EEJan Reineke, Björn Wachter, Stephan Thesing, Reinhard Wilhelm, Ilia Polian, Jochen Eisinger, Bernd Becker: A Definition and Classification of Timing Anomalies. WCET 2006
26EEYuyi Tang, Hans-Joachim Wunderlich, Piet Engelke, Ilia Polian, Bernd Becker, Jürgen Schlöffel, Friedrich Hapke, Michael Wittke: X-masking during logic BIST and its impact on defect coverage. IEEE Trans. VLSI Syst. 14(2): 193-202 (2006)
25EEPiet Engelke, Ilia Polian, Michel Renovell, Bernd Becker: Simulating Resistive-Bridging and Stuck-At Faults. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2181-2192 (2006)
24EEPiet Engelke, Ilia Polian, Michel Renovell, Bernd Becker: Automatic Test Pattern Generation for Resistive Bridging Faults. J. Electronic Testing 22(1): 61-69 (2006)
23EEBernd Becker, Ilia Polian, Sybille Hellebrand, Bernd Straube, Hans-Joachim Wunderlich: DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems). it - Information Technology 48(5): 304- (2006)
2005
22EESandip Kundu, Piet Engelke, Ilia Polian, Bernd Becker: On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. Asian Test Symposium 2005: 266-271
21EEIlia Polian, Thomas Fiehn, Bernd Becker, John P. Hayes: A Family of Logical Fault Models for Reversible Circuits. Asian Test Symposium 2005: 422-427
20EEIlia Polian, Alejandro Czutro, Bernd Becker: Evolutionary Optimization in Code-Based Test Compression. DATE 2005: 1124-1129
19EEIlia Polian, Sandip Kundu, Jean Marc Gallière, Piet Engelke, Michel Renovell, Bernd Becker: Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies. VTS 2005: 343-348
18EEIlia Polian, Piet Engelke, Michel Renovell, Bernd Becker: Modeling Feedback Bridging Faults with Non-Zero Resistance. J. Electronic Testing 21(1): 57-69 (2005)
17EEIlia Polian: Nichtstandardfehlermodelle für digitale Logikschaltkreise: Simulation, prüfgerechter Entwurf, industrielle Anwendungen (On Non-standard Fault Models for Logic Digital Circuits: Simulation, Design for Testability, Industrial Applications). it - Information Technology 47(3): 172-174 (2005)
2004
16EEJohn P. Hayes, Ilia Polian, Bernd Becker: Testing for Missing-Gate Faults in Reversible Circuits. Asian Test Symposium 2004: 100-105
15EEYuyi Tang, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Piet Engelke, Ilia Polian, Bernd Becker: X-Masking During Logic BIST and Its Impact on Defect Coverage. ITC 2004: 442-451
14EEPiet Engelke, Ilia Polian, Michel Renovell, Bharath Seshadri, Bernd Becker: The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults. VTS 2004: 171-178
13EEIlia Polian, Bernd Becker: Scalable Delay Fault BIST for Use with Low-Cost ATE. J. Electronic Testing 20(2): 181-197 (2004)
2003
12EEIlia Polian, Bernd Becker, Sudhakar M. Reddy: Evolutionary Optimization of Markov Sources for Pseudo Random Scan BIST. DATE 2003: 11184-11185
11EEPiet Engelke, Ilia Polian, Michel Renovell, Bernd Becker: Simulating Resistive Bridging and Stuck-At Faults. ITC 2003: 1051-1059
10 Ilia Polian, Bernd Becker: Reducing ATE Cost in System-on-Chip Test. VLSI-SOC 2003: 337-342
9EEIlia Polian, Wolfgang Günther, Bernd Becker: Pattern-based verification of connections to intellectual property cores. Integration 35(1): 25-44 (2003)
8EEIlia Polian, Bernd Becker: Multiple Scan Chain Design for Two-Pattern Testing. J. Electronic Testing 19(1): 37-48 (2003)
7EEJonathan Bradford, Hartmut Delong, Ilia Polian, Bernd Becker: Simulating Realistic Bridging and Crosstalk Faults in an Industrial Setting. J. Electronic Testing 19(4): 387-395 (2003)
2002
6EEIlia Polian, Irith Pomeranz, Bernd Becker: Exact Computation of Maximally Dominating Faults and Its Application to n-Detection Tests. Asian Test Symposium 2002: 2-14
5EEIlia Polian, Bernd Becker: Stop & Go BIST. IOLTW 2002: 147-151
4EEIlia Polian, Martin Keim, Nicolai Mallig, Bernd Becker: Sequential n -Detection Criteria: Keep It Simple. IOLTW 2002: 189
3EEIlia Polian, Piet Engelke, Bernd Becker: Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics. ISMVL 2002: 216-
2001
2EEIlia Polian, Wolfgang Günther, Bernd Becker: Efficient Pattern-Based Verification of Connections to IP Cores . Asian Test Symposium 2001: 443-448
1EEIlia Polian, Bernd Becker: Multiple Scan Chain Design for Two-Pattern Testing. VTS 2001: 88-93

Coauthor Index

1J. Bartholomeyczik [35]
2Bernd Becker [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [29] [30] [31] [34] [35] [36] [37] [38] [39] [40] [41] [42] [44] [45] [46] [47] [48]
3Jonathan Bradford [7]
4Wu-Tung Cheng [40]
5Alejandro Czutro [20] [29] [34] [36] [47]
6Hartmut Delong [7]
7M. Doelle [35]
8Jochen Eisinger [27] [31]
9Piet Engelke [3] [11] [14] [15] [18] [19] [22] [24] [25] [26] [39] [40] [45] [46] [47]
10Thomas Fiehn [21]
11Hideo Fujiwara [30] [32] [33]
12Jean Marc Gallière [19]
13Kunal P. Ganeshpure [48]
14Wolfgang Günther [2] [9]
15Friedrich Hapke [15] [26]
16John P. Hayes [16] [21] [37]
17Sybille Hellebrand [23]
18Seiji Kajihara [45]
19Martin Keim [4] [40]
20Sandip Kundu [19] [22] [28] [29] [34] [39] [48]
21Matthew Lewis [47]
22Nicolai Mallig [4]
23Alexander Metzner [31]
24Kohei Miyase [45]
25Yusuke Nakamura [45]
26Masato Nakasato [30]
27Damian Nowroth [38] [42]
28Satoshi Ohtake [30]
29O. Paul [35]
30Irith Pomeranz [6] [44]
31Wenjing Rao [43]
32Sudhakar M. Reddy [12] [41] [44] [47]
33Jan Reineke [27]
34Michel Renovell [11] [14] [18] [19] [24] [25] [39]
35R. Roth [35]
36P. Ruther [35]
37Jürgen Schlöffel [26] [46]
38K. Seitz [35]
39Bharath Seshadri [14] [39]
40Stefan Spinner [35] [40] [45]
41Bernd Straube [23]
42Xun Tang [44]
43Yuyi Tang [15] [26]
44Stephan Thesing [27] [31]
45Harald P. E. Vranken [15]
46Björn Wachter [27]
47Xiaoqing Wen [45]
48Reinhard Wilhelm [27] [31]
49Michael Wittke [15] [26]
50Hans-Joachim Wunderlich [15] [23] [26]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)