2009 | ||
---|---|---|
191 | EE | Tobias Becker, Wayne Luk, Peter Y. K. Cheung: Parametric Design for Reconfigurable Software-Defined Radio. ARC 2009: 15-26 |
190 | EE | David B. Thomas, Lee Howes, Wayne Luk: A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation. FPGA 2009: 63-72 |
189 | EE | Kong Woei Susanto, Tim Todman, José Gabriel F. Coutinho, Wayne Luk: Design Validation by Symbolic Simulation and Equivalence Checking: A Case Study in Memory Optimization for Image Manipulation. SOFSEM 2009: 509-520 |
2008 | ||
188 | EE | Pedro Echeverría, David B. Thomas, Marisa López-Vallejo, Wayne Luk: An FPGA run-time parameterisable Log-Normal Random Number Generator. ARC 2008: 219-230 |
187 | EE | Qiwei Jin, David B. Thomas, Wayne Luk, Benjamin Cope: Exploring Reconfigurable Architectures for Binomial-Tree Pricing Models. ARC 2008: 243-253 |
186 | EE | Kubilay Atasu, Oskar Mencer, Wayne Luk, Can C. Özturan, Günhan Dündar: Fast custom instruction identification by convex subgraph enumeration. ASAP 2008: 1-6 |
185 | EE | David B. Thomas, Wayne Luk: Resource efficient generators for the floating-point uniform and exponential distributions. ASAP 2008: 102-107 |
184 | EE | Ka Fai Cedric Yiu, Chun Hok Ho, Nedelko Grbic, Yao Lu, Xiaoxiang Shi, Wayne Luk: Reconfigurable acceleration of microphone array algorithms for speech enhancement. ASAP 2008: 203-208 |
183 | EE | Ben Cope, Peter Y. K. Cheung, Wayne Luk: Using Reconfigurable Logic to Optimise GPU Memory Accesses. DATE 2008: 44-49 |
182 | EE | William G. Osborne, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer: Power-Aware and Branch-Aware Word-Length Optimization. FCCM 2008: 129-138 |
181 | EE | David B. Thomas, Wayne Luk: Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation. FCCM 2008: 229-238 |
180 | EE | David B. Thomas, Wayne Luk: FPGA-optimised high-quality uniform random number generators. FPGA 2008: 235-244 |
179 | EE | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk: High-throughput interconnect wave-pipelining for global communication in FPGAs. FPGA 2008: 258 |
178 | EE | Andrew Lam, Steven J. E. Wilton, Philip Heng Wai Leong, Wayne Luk: An analytical model describing the relationships between logic architecture and FPGA density. FPL 2008: 221-226 |
177 | EE | Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton: Rapid estimation of power consumption for hybrid FPGAs. FPL 2008: 227-232 |
176 | EE | David B. Thomas, Wayne Luk: Sampling from the exponential distribution using independent Bernoulli variates. FPL 2008: 239-244 |
175 | EE | Yuet Ming Lam, José Gabriel F. Coutinho, Wayne Luk, Philip Heng Wai Leong: Mapping and scheduling with task clustering for heterogeneous computing systems. FPL 2008: 275-280 |
174 | EE | Markus Koester, Wayne Luk, Geoffrey Brown: A hardware compilation flow for instance-specific VLIW cores. FPL 2008: 619-622 |
173 | EE | Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y. K. Cheung, Tero Rissa: Towards benchmarking energy efficiency of reconfigurable architectures. FPL 2008: 691-694 |
172 | EE | Terrence S. T. Mak, Crescenzo D'Alessandro, N. Pete Sedcole, Peter Y. K. Cheung, Alexandre Yakovlev, Wayne Luk: Implementation of Wave-Pipelined Interconnects in FPGAs. NOCS 2008: 213-214 |
171 | EE | Tim Todman, Haohuan Fu, Brittle Tsoi, Oskar Mencer, Wayne Luk: Smart Enumeration: A Systematic Approach to Exhaustive Search. PATMOS 2008: 429-438 |
170 | EE | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk: Interconnection lengths and delays estimation for communication links in FPGAs. SLIP 2008: 1-10 |
169 | EE | Terrence S. T. Mak, Crescenzo D'Alessandro, N. Pete Sedcole, Peter Y. K. Cheung, Alexandre Yakovlev, Wayne Luk: Global interconnections in FPGAs: modeling and performance analysis. SLIP 2008: 51-58 |
168 | EE | Dong-U Lee, Ray C. C. Cheung, Wayne Luk, John D. Villasenor: Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations. IEEE Trans. Computers 57(5): 686-701 (2008) |
167 | EE | Sherif Yusuf, Wayne Luk, Morris Sloman, Naranker Dulay, Emil C. Lupu, Geoffrey Brown: Reconfigurable Architecture for Network Flow Analysis. IEEE Trans. VLSI Syst. 16(1): 57-65 (2008) |
166 | EE | Kubilay Atasu, Can C. Özturan, Günhan Dündar, Oskar Mencer, Wayne Luk: CHIPS: Custom Hardware Instruction Processor Synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 528-541 (2008) |
165 | EE | Wayne Luk, Yvon Savaria, Oskar Mencer: Guest Editorial: 20 Years of ASAP. Signal Processing Systems 53(1-2): 1-2 (2008) |
164 | EE | Steven J. E. Wilton, Chun Hok Ho, Bradley R. Quinton, Philip Heng Wai Leong, Wayne Luk: A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications. TRETS 1(1): (2008) |
163 | EE | Duncan A. Buell, Wayne Luk: Introduction. TRETS 1(1): (2008) |
162 | EE | David B. Thomas, Wayne Luk: Multivariate Gaussian Random Number Generation Targeting Reconfigurable Hardware. TRETS 1(2): (2008) |
2007 | ||
161 | EE | David B. Thomas, Wayne Luk, Michael Stumpf: Reconfigurable Hardware Acceleration of Canonical Graph Labelling. ARC 2007: 302-313 |
160 | EE | David B. Thomas, Jacob A. Bower, Wayne Luk: Automatic Generation and Optimisation of Reconfigurable Financial Monte-Carlo Simulations. ASAP 2007: 168-173 |
159 | EE | Ben Cope, Peter Y. K. Cheung, Wayne Luk: Bridging the Gap between FPGAs and Multi-Processor Architectures: A Video Processing Perspective. ASAP 2007: 308-313 |
158 | Tim Todman, Wayne Luk: Domain Specific Transformations for Hardware Ray Tracing. CPA 2007: 479-492 | |
157 | EE | Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Wayne Luk, Can C. Özturan, Günhan Dündar: Optimizing instruction-set extensible processors under data bandwidth constraints. DATE 2007: 588-593 |
156 | EE | Haohuan Fu, Oskar Mencer, Wayne Luk: Optimizing Logarithmic Arithmetic on FPGAs. FCCM 2007: 163-172 |
155 | EE | David B. Thomas, Wayne Luk: Sampling from the Multivariate Gaussian Distribution using Reconfigurable Hardware. FCCM 2007: 3-12 |
154 | EE | Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung: A Hybrid Memory Sub-system for Video Coding Applications. FCCM 2007: 317-318 |
153 | EE | Tobias Becker, Wayne Luk, Peter Y. K. Cheung: Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration. FCCM 2007: 35-44 |
152 | EE | Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Bradley R. Quinton: A synthesizable datapath-oriented embedded FPGA fabric. FPGA 2007: 33-41 |
151 | EE | Chun Hok Ho, Chi Wai Yu, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton: Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications. FPL 2007: 196-201 |
150 | EE | William G. Osborne, Ray C. C. Cheung, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer: Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems. FPL 2007: 617-620 |
149 | EE | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk, K. P. Lam: A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing. NOCS 2007: 173-182 |
148 | EE | David B. Thomas, Wayne Luk, Philip Heng Wai Leong, John D. Villasenor: Gaussian random number generators. ACM Comput. Surv. 39(4): (2007) |
147 | EE | Tero Rissa, Adam Donlin, Wayne Luk: Evaluation of SystemC Modelling of Reconfigurable Embedded Systems CoRR abs/0710.4845: (2007) |
146 | EE | Ray C. C. Cheung, Dong-U Lee, Wayne Luk, John D. Villasenor: Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method. IEEE Trans. VLSI Syst. 15(8): 952-962 (2007) |
145 | EE | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: Run-Time Integration of Reconfigurable Video Processing Systems. IEEE Trans. VLSI Syst. 15(9): 1003-1016 (2007) |
144 | EE | Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Michael F. P. O'Boyle, Dionisios N. Pnevmatikatos, Alex Ramírez, Pascal Sainrat, André Seznec, Per Stenström, Olivier Temam: High-Performance Embedded Architecture and Compilation Roadmap. T. HiPEAC 1: 5-29 (2007) |
143 | EE | José Gabriel F. Coutinho, M. P. T. Juvonen, J. L. Wang, B. L. Lo, Wayne Luk, Oskar Mencer, G. Z. Yang: Designing a Posture Analysis System with Hardware Implementation. VLSI Signal Processing 47(1): 33-45 (2007) |
142 | EE | David B. Thomas, Wayne Luk: High Quality Uniform Random Number Generation Using LUT Optimised State-transition Matrices. VLSI Signal Processing 47(1): 77-92 (2007) |
2006 | ||
141 | EE | Su-Shin Ang, George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: A Flexible Multi-port Caching Scheme for Reconfigurable Platforms. ARC 2006: 205-216 |
140 | EE | Sherif Yusuf, Wayne Luk, M. K. N. Szeto, William G. Osborne: UNITE: Uniform Hardware-Based Network Intrusion deTection Engine. ARC 2006: 389-400 |
139 | EE | Arran Derbyshire, Tobias Becker, Wayne Luk: Incremental elaboration for run-time reconfigurable hardware designs. CASES 2006: 93-102 |
138 | EE | Robert G. Dimond, Oskar Mencer, Wayne Luk: Automating processor customisation: optimised memory access and resource sharing. DATE 2006: 206-211 |
137 | Chun Hok Ho, Ka Fai Cedric Yiu, Jiaquan Huo, Sven Nordholm, Wayne Luk: Reconfigurable Acceleration of Robust Frequency-Domain Echo Cancellation. ERSA 2006: 184-190 | |
136 | EE | Robert G. Dimond, Oskar Mencer, Wayne Luk: Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA. FCCM 2006: 175-184 |
135 | EE | Oliver Pell, Wayne Luk: Generating Parametrised Hardware Libraries from Higher-Order Descriptions. FCCM 2006: 297-298 |
134 | EE | Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton, Sergio López-Buedo: Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs. FCCM 2006: 35-44 |
133 | EE | David B. Thomas, Wayne Luk: Efficient Hardware Generation of Random Variates with Arbitrary Distributions. FCCM 2006: 57-66 |
132 | EE | Andreas Fidjeland, Wayne Luk: Archlog: High-Level Synthesis of Reconfigurable Multiprocessors for Logic Programming. FPL 2006: 1-6 |
131 | EE | Oliver Pell, Wayne Luk: Compiling Higher-Order Polymorphic Hardware Descriptions Into Parametrised VHDL Libraries with Flexible Placement Information. FPL 2006: 1-6 |
130 | EE | Suhaib A. Fahmy, Christos-Savvas Bouganis, Peter Y. K. Cheung, Wayne Luk: Efficient Realtime FPGA Implementation of the Trace Transform. FPL 2006: 1-6 |
129 | EE | David B. Thomas, Wayne Luk: Non-Uniform Random Number Generation Through Piecewise Linear Approximations. FPL 2006: 1-6 |
128 | EE | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk: On-FPGA Communication Architectures and Design Factors. FPL 2006: 1-8 |
127 | EE | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: On-Chip Communication in Run-Time Assembled Reconfigurable Systems. ICSAMOS 2006: 168-176 |
126 | EE | Steve McKeever, Wayne Luk: Provably-correct hardware compilation tools based on pass separation techniques. Formal Asp. Comput. 18(2): 120-142 (2006) |
125 | EE | Dong-U Lee, John D. Villasenor, Wayne Luk, Philip Heng Wai Leong: A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis. IEEE Trans. Computers 55(6): 659-671 (2006) |
124 | EE | Dong-U Lee, Altaf Abdul Gaffar, Ray C. C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides: Accuracy-Guaranteed Bit-Width Optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1990-2000 (2006) |
123 | EE | Jacob A. Bower, Wayne Luk, Oskar Mencer, Michael J. Flynn, Martin Morf: Dynamic clock-frequencies for FPGAs. Microprocessors and Microsystems 30(6): 388-397 (2006) |
2005 | ||
122 | EE | Andreas Fidjeland, Wayne Luk: Customising Application-Speci.c Multiprocessor Systems: a Case Study. ASAP 2005: 239-246 |
121 | EE | Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung: Automating custom-precision function evaluation for embedded processors. CASES 2005: 22-31 |
120 | EE | Oliver Pell, Wayne Luk: Resolving Quartz Overloading. CHARME 2005: 380-383 |
119 | EE | Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk: MiniBit: bit-width optimization via affine arithmetic. DAC 2005: 837-840 |
118 | EE | Ray C. C. Cheung, Wayne Luk, Peter Y. K. Cheung: Reconfigurable Elliptic Curve Cryptosystems on a Chip. DATE 2005: 24-29 |
117 | EE | Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk: Hardware Acceleration of Hidden Markov Model Decoding for Person Detection. DATE 2005: 8-13 |
116 | Wayne Luk, Sherif Yusuf, Morris Sloman, Geoffrey Brown, Emil C. Lupu, Naranker Dulay: A Combined Hardware-Software Architecture for Network Flow. ERSA 2005: 149-155 | |
115 | Wim J. C. Melis, Kieron Turkington, Alexander Whitton, Wayne Luk, Peter Y. K. Cheung, Paul Metzgen: Cell Based Motion Estimators for Reconfigurable Platforms. ERSA 2005: 218-224 | |
114 | EE | José Gabriel F. Coutinho, Jun Jiang, Wayne Luk: Interleaving Behavioral and Cycle-Accurate Descriptions for Reconfigurable Hardware Compilation. FCCM 2005: 245-254 |
113 | EE | Paul Baker, Tim Todman, Henry Styles, Wayne Luk: Reconfigurable Designs for Radiosity. FCCM 2005: 95-104 |
112 | Robert G. Dimond, Oskar Mencer, Wayne Luk: CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools. FPL 2005: 1-6 | |
111 | Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk: Novel FPGA-Based Implementation of Median and Weighted Median Filters for Image Processing. FPL 2005: 142-147 | |
110 | Guanglie Zhang, Philip Heng Wai Leong, Dong-U Lee, John D. Villasenor, Ray C. C. Cheung, Wayne Luk: Ziggurat-based Hardware Gaussian Random Number Generator. FPL 2005: 275-280 | |
109 | Henry Styles, Wayne Luk: Compilation and Management of Phase-Optimized Reconfigurable Systems. FPL 2005: 311-316 | |
108 | Sherif Yusuf, Wayne Luk: Bitwise Optimised CAM for Network Intrusion Detection Systems. FPL 2005: 444-449 | |
107 | Ben Cope, Peter Y. K. Cheung, Wayne Luk, Sarah Witt: Have GPUs Made FPGAs Redundant in the Field of Video Processing? FPT 2005: 111-118 | |
106 | C. T. Chow, L. S. M. Tsui, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton: Dynamic Voltage Scaling for Commercial FPGAs. FPT 2005: 173-180 | |
105 | G. L. Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, Chris C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk: Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. FPT 2005: 215-222 | |
104 | Andreas Fidjeland, Wayne Luk: An Overview of High-Level Synthesis of Multiprocessors for Logic Programming. FPT 2005: 333-334 | |
103 | David B. Thomas, Wayne Luk: High Quality Uniform Random Number Generation Through LUT Optimised Linear Recurrences. FPT 2005: 61-68 | |
102 | M. P. T. Juvonen, José Gabriel F. Coutinho, J. L. Wang, B. L. Lo, Wayne Luk, Oskar Mencer, G. Z. Yang: Custom Hardware Architectures for Posture Analysis. FPT 2005: 77-84 | |
101 | EE | Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk: Optimizing Hardware Function Evaluation. IEEE Trans. Computers 54(12): 1520-1531 (2005) |
100 | EE | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Optimum and heuristic synthesis of multiple word-length architectures. IEEE Trans. VLSI Syst. 13(1): 39-57 (2005) |
99 | EE | Dong-U Lee, Wayne Luk, John D. Villasenor, Guanglie Zhang, Philip Heng Wai Leong: A hardware Gaussian noise generator using the Wallace method. IEEE Trans. VLSI Syst. 13(8): 911-920 (2005) |
98 | EE | Ray C. C. Cheung, N. J. Telle, Wayne Luk, Peter Y. K. Cheung: Customizable elliptic curve cryptosystems. IEEE Trans. VLSI Syst. 13(9): 1048-1059 (2005) |
97 | EE | Tim Todman, José Gabriel F. Coutinho, Wayne Luk: Customisable Hardware Compilation. The Journal of Supercomputing 32(2): 119-137 (2005) |
2004 | ||
96 | EE | Tero Rissa, Adam Donlin, Wayne Luk: Evaluation of SystemC Modelling of Reconfigurable Embedded Systems. DATE 2004: 253-258 |
95 | EE | Tero Rissa, Adam Donlin, Wayne Luk: Evaluation of SystemC Modelling of Reconfigurable Embedded Systems. DATE 2004: 253-258 |
94 | Tim Todman, José Gabriel F. Coutinho, Wayne Luk: Customisable Hardware Compilation. ERSA 2004: 18-28 | |
93 | Tero Rissa, Wayne Luk, Peter Y. K. Cheung: Distinguished Paper: Automated Combination of Simulation and Hardware Prototyping. ERSA 2004: 184-193 | |
92 | EE | Dong-U Lee, Wayne Luk, Connie Wang, Christopher Jones, Michael Smith, John D. Villasenor: A Flexible Hardware Encoder for Low-Density Parity-Check Codes. FCCM 2004: 101-111 |
91 | EE | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: A Structured System Methodology for FPGA Based System-on-A-Chip Design. FCCM 2004: 271-272 |
90 | EE | Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung: Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs. FCCM 2004: 79-88 |
89 | EE | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: A Structured Methodology for System-on-an-FPGA Design. FPL 2004: 1047-1051 |
88 | EE | David B. Thomas, Wayne Luk: Implementing Graphics Shaders Using FPGAs. FPL 2004: 1173 |
87 | EE | Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne Luk: Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs. FPL 2004: 364-373 |
86 | EE | Tero Rissa, Peter Y. K. Cheung, Wayne Luk: SoftSONIC: A Customisable Modular Platform for Video Applications. FPL 2004: 54-63 |
85 | EE | Tim Todman, Wayne Luk: Methods and Tools for High-Resolution Imaging. FPL 2004: 627-636 |
84 | EE | Steven J. E. Wilton, Su-Shin Ang, Wayne Luk: The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays. FPL 2004: 719-728 |
83 | Wim J. C. Melis, Peter Y. K. Cheung, Wayne Luk: Autonomous Memory Block for reconfigurable computing. ISCAS (2) 2004: 581-584 | |
82 | EE | Nicolas Telle, Wayne Luk, Ray C. C. Cheung: Customising Hardware Designs for Elliptic Curve Cryptography. SAMOS 2004: 274-283 |
81 | EE | Wayne Luk: Customising Processors: Design-Time and Run-Time Opportunities. SAMOS 2004: 49-58 |
80 | EE | Henry Styles, Wayne Luk: Exploiting Program Branch Probabilities in Hardware Compilation. IEEE Trans. Computers 53(11): 1408-1419 (2004) |
79 | EE | Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung: A Gaussian Noise Generator for Hardware-Based Simulations. IEEE Trans. Computers 53(12): 1523-1534 (2004) |
78 | EE | Oskar Mencer, Wayne Luk: Parameterized High Throughput Function Evaluation for FPGAs. VLSI Signal Processing 36(1): 17-25 (2004) |
2003 | ||
77 | Per Haglund, Oskar Mencer, Wayne Luk, Benjamin Tai: PyHDL: Hardware Scripting with Python. Engineering of Reconfigurable Systems and Algorithms 2003: 288-291 | |
76 | EE | Tim Todman, Wayne Luk: Real-time Extensions to a C-like Hardware Description Language. FCCM 2003: 302-304 |
75 | EE | T. K. Lee, Sherif Yusuf, Wayne Luk, Morris Sloman, Emil Lupu, Naranker Dulay: Compiling Policy Descriptions into Reconfigurable Firewall Processors. FCCM 2003: 39- |
74 | EE | Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung: A Hardware Gaussian Noise Generator for Channel Code Evaluation. FCCM 2003: 69- |
73 | EE | Per Haglund, Oskar Mencer, Wayne Luk, Benjamin Tai: Hardware Design with a Scripting Language. FPL 2003: 1040-1043 |
72 | EE | Jun Jiang, Wayne Luk, Daniel Rueckert: FPGA-Based Computation of Free-Form Deformations. FPL 2003: 1057-1061 |
71 | EE | Theerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk: Cluster-Driven Hardware/Software Partitioning and Scheduling Approach for a Reconfigurable Computer System. FPL 2003: 1071-1074 |
70 | EE | Henry Styles, Wayne Luk: Branch Optimisation Techniques for Hardware Compilation. FPL 2003: 324-333 |
69 | EE | Theerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk: A Unified Codesign Run-Time Environment for the UltraSONIC Reconfigurable Computer. FPL 2003: 396-405 |
68 | EE | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: A Reconfigurable Platform for Real-Time Embedded Video Image Processing. FPL 2003: 606-615 |
67 | EE | Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung: Non-uniform Segmentation for Hardware Function Evaluation. FPL 2003: 796-807 |
66 | EE | T. K. Lee, Sherif Yusuf, Wayne Luk, Morris Sloman, Emil Lupu, Naranker Dulay: Irregular Reconfigurable CAM Structures for Firewall Applications. FPL 2003: 890-899 |
65 | EE | Steve McKeever, Wayne Luk, Arran Derbyshire: Towards Verifying Parametrised Hardware Libraries with Relative Placement Information. HICSS 2003: 279 |
64 | EE | Tim Todman, Wayne Luk: Combining Imperative and Declarative Hardware Descriptions. HICSS 2003: 280 |
63 | EE | Theerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk: Multitasking in hardware-software codesign for reconfigurable computer. ISCAS (5) 2003: 621-624 |
62 | EE | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Synthesis of saturation arithmetic architectures. ACM Trans. Design Autom. Electr. Syst. 8(3): 334-354 (2003) |
61 | EE | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Wordlength optimization for linear digital signal processing. IEEE Trans. on CAD of Integrated Circuits and Systems 22(10): 1432-1442 (2003) |
2002 | ||
60 | EE | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Optimum Wordlength Allocation. FCCM 2002: 219-228 |
59 | EE | Henry Styles, Wayne Luk: Accelerating Radiosity Calculations Using Reconfigurable Platforms. FCCM 2002: 279-281 |
58 | EE | Theerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk: Tabu Search with Intensification Strategy for Functional Partitioning in Hardware-Software Codesign. FCCM 2002: 297-298 |
57 | EE | Wim J. C. Melis, Peter Y. K. Cheung, Wayne Luk: Image Registration of Real-Time Video Data Using the SONIC Reconfigurable Computer Platform. FCCM 2002: 3-12 |
56 | EE | Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi: Customising Floating-Point Designs. FCCM 2002: 315-317 |
55 | EE | Jörn Gause, Peter Y. K. Cheung, Wayne Luk: Reconfigurable Shape-Adaptive Template Matching Architectures. FCCM 2002: 98- |
54 | EE | Steve McKeever, Wayne Luk, Arran Derbyshire: Compiling Hardware Descriptions with Relative Placement Information for Parametrised Libraries. FMCAD 2002: 342-359 |
53 | EE | Wim J. C. Melis, Peter Y. K. Cheung, Wayne Luk: Image Registration of Real-Time Broadcast Video Using the UltraSONIC Reconfigurable Computer. FPL 2002: 1148-1151 |
52 | EE | Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi, James Hwang: Automating Customisation of Floating-Point Designs. FPL 2002: 523-533 |
51 | EE | Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung: Run-Time Adaptive Flexible Instruction Processors. FPL 2002: 545-555 |
2001 | ||
50 | EE | Steve McKeever, Wayne Luk: Towards Provably-Correct Hardware Compilation Tools Based on Pass Separation Techniques. CHARME 2001: 212-227 |
49 | EE | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Heuristic datapath allocation for multiple wordlength systems. DATE 2001: 791-797 |
48 | EE | Markus Weinhardt, Wayne Luk: Task-Parallel Programming of Reconfigurable Systems. FPL 2001: 172-181 |
47 | EE | Oskar Mencer, Nicolas Boullis, Wayne Luk, Henry Styles: Parameterized Function Evaluation for FPGAs. FPL 2001: 544-554 |
46 | EE | Chakkapas Visavakul, Peter Y. K. Cheung, Wayne Luk: A Digit-Serial Structure for Reconfigurable Multipliers. FPL 2001: 565-573 |
45 | EE | Markus Weinhardt, Wayne Luk: Pipeline vectorization. IEEE Trans. on CAD of Integrated Circuits and Systems 20(2): 234-248 (2001) |
44 | EE | Nabeel Shirazi, Dan Benyamin, Wayne Luk, Peter Y. K. Cheung, Shaori Guo: Quantitative Analysis of FPGA-based Database Searching. VLSI Signal Processing 28(1-2): 85-96 (2001) |
2000 | ||
43 | EE | Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung: Flexible instruction processors. CASES 2000: 193-200 |
42 | EE | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Multiple Precision for Resource Minimization. FCCM 2000: 307-308 |
41 | EE | Markus Weinhardt, Wayne Luk: Evaluating Hardware Compilation Techniques. FCCM 2000: 333-334 |
40 | EE | Arran Derbyshire, Wayne Luk: Combining Serialization and Reconfiguration for Convolver Designs. FCCM 2000: 344-346 |
39 | EE | Henry Styles, Wayne Luk: Customizing Graphics Applications: Techniques and Programming Interface. FCCM 2000: 77-90 |
38 | EE | Xue-Jie Zhang, Kam-Wing Ng, Wayne Luk: A Combined Approach to High-Level Synthesis for Dynamically Reconfigurable Systems. FPL 2000: 361-370 |
37 | EE | Arran Derbyshire, Wayne Luk: Combining Serialisation and Reconfiguration for FPGA Designs. FPL 2000: 636-645 |
36 | EE | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Multiple-Wordlength Resource Binding. FPL 2000: 646-655 |
35 | EE | Jörn Gause, Peter Y. K. Cheung, Wayne Luk: Static and Dynamic Reconfigurable Designs for a 2D Shape-Adaptive DCT. FPL 2000: 96-105 |
34 | Simon D. Haynes, John Stone, Peter Y. K. Cheung, Wayne Luk: Video Image Processing with the Sonic Architecture. IEEE Computer 33(4): 50-57 (2000) | |
33 | EE | Jeffrey Arnold, Wayne Luk, Ken Pocek: Guest Editors' Introduction. VLSI Signal Processing 24(2-3): 127 (2000) |
1999 | ||
32 | EE | Wayne Luk, T. K. Lee, J. Rice, Nabeel Shirazi, Peter Y. K. Cheung: Reconfigurable Computing for Augmented Reality. FCCM 1999: 136-145 |
31 | EE | Dan Benyamin, John D. Villasenor, Wayne Luk: Optimizing FPGA-Based Vector Product Designs. FCCM 1999: 188- |
30 | EE | Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk, John Stone: SONIC - A Plug-In Architecture for Video Processing. FCCM 1999: 280-281 |
29 | EE | Markus Weinhardt, Wayne Luk: Pipeline Vectorization for Reconfigurable Systems. FCCM 1999: 52-62 |
28 | EE | Florent de Dinechin, Wayne Luk, Steve McKeever: Towards Adaptable Hierarchical Placement for FPGAs. FPGA 1999: 254 |
27 | Wayne Luk, Arran Derbyshire, Shaori Guo, D. Siganos: Serial Hardware Libraries for Reconfigurable Designs. FPL 1999: 185-194 | |
26 | Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk, John Stone: SONIC - A Plug-In Architecture for Video Processing. FPL 1999: 21-30 | |
25 | Nabeel Shirazi, Wayne Luk, Dan Benyamin, Peter Y. K. Cheung: Quantitative Analysis of Run-Time Reconfigurable Database Search. FPL 1999: 253-263 | |
24 | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs. FPL 1999: 323-332 | |
23 | Markus Weinhardt, Wayne Luk: Memory Access Optimization and RAM Inference for Pipeline Vectorization. FPL 1999: 61-70 | |
1998 | ||
22 | EE | Nabeel Shirazi, Wayne Luk, Peter Y. K. Cheung: Automating Production of Run-Time Reconfigurable Designs. FCCM 1998: 147- |
21 | EE | Wayne Luk, P. Andreou, Arran Derbyshire, F. Dupont-De-Dinechin, J. Rice, Nabeel Shirazi, D. Siganos: A Reconfigurable Engine for Real-Time Video Processing. FPL 1998: 169-178 |
20 | EE | Nabeel Shirazi, Wayne Luk, Peter Y. K. Cheung: Run-Time Management of Dynamically Recongigurable Designs. FPL 1998: 59-68 |
19 | EE | Wayne Luk, Steve McKeever: Pebble: A Language for Parametrised and Reconfigurable Hardware Design. FPL 1998: 9-18 |
1997 | ||
18 | Wayne Luk, Peter Y. K. Cheung, Manfred Glesner: Field-Programmable Logic and Applications, 7th International Workshop, FPL '97, London, UK, September 1-3, 1997, Proceedings Springer 1997 | |
17 | EE | Wayne Luk, Nabeel Shirazi, Peter Y. K. Cheung: Compilation tools for run-time reconfigurable designs. FCCM 1997: 56-65 |
16 | Wayne Luk, Nabeel Shirazi, Shaori Guo, Peter Y. K. Cheung: Pipeline morphing and virtual pipelines. FPL 1997: 111-120 | |
15 | Anjit Sekhar Chaudhuri, Peter Y. K. Cheung, Wayne Luk: A reconfigurable data-localised array for morphological algorithms. FPL 1997: 344-353 | |
14 | Patrick I. Mackinlay, Peter Y. K. Cheung, Wayne Luk, Richard Sandiford: Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research. FPL 1997: 91-100 | |
13 | John O'Leary, Geoffrey Brown, Wayne Luk: Verified Compilation of Communicating Processes into Clocked Circuits. Formal Asp. Comput. 9(5-6): 537-559 (1997) | |
1996 | ||
12 | Wayne Luk, Shaori Guo, Nabeel Shirazi, N. Zhuang: A Framework for Developing Parameterised FPGA Libraries. FPL 1996: 24-33 | |
11 | Geoffrey Brown, Wayne Luk, John O'Leary: Retargeting a Hardware Compiler Using Protokol Converters. Formal Asp. Comput. 8(2): 209-237 (1996) | |
10 | EE | Matthew Aubury, Wayne Luk: Binomial filters. VLSI Signal Processing 12(1): 35-50 (1996) |
9 | EE | Wayne Luk, Duncan A. Buell: Guest editors' introduction. VLSI Signal Processing 12(1): 5 (1996) |
1995 | ||
8 | Will Moore, Wayne Luk: Field-Programmable Logic and Applications, 5th International Workshop, FPL '95, Oxford, UK, August 29 - September 1, 1995, Proceedings Springer 1995 | |
7 | Adrian Lawrence, Andrew Kay, Wayne Luk, Toshio Nomura, Ian Page: Using Reconfigurable Hardware to Speed up Product Development and Performance. FPL 1995: 111-118 | |
6 | Shaori Guo, Wayne Luk: Compiling Ruby into FPGAs. FPL 1995: 188-197 | |
1994 | ||
5 | EE | Wayne Luk, Teddy Wu: Towards a declarative framework for hardware-software codesign. CODES 1994: 181-188 |
4 | Mat Newman, Wayne Luk, Ian Page: Constraint-based Hierarchical Placement of Parallel Programs. FPL 1994: 220-229 | |
3 | Shaori Guo, Wayne Luk, Penelope Probert: Developing Parallel Architectures for Range and Image Sensors. ICRA 1994: 2205-2210 | |
1993 | ||
2 | EE | Will Moore, Wayne Luk: Introduction. VLSI Signal Processing 6(2): 99-100 (1993) |
1990 | ||
1 | Wayne Luk, Geoffrey Brown: A Systolic LRU Processor and Its Top-Down Development. Sci. Comput. Program. 15(2-3): 217-233 (1990) |