2008 | ||
---|---|---|
120 | EE | Andrey Mokhov, Alexandre Yakovlev: Verification of conditional partial order graphs. ACSD 2008: 128-137 |
119 | EE | Simon Ogg, Bashir M. Al-Hashimi, Alexandre Yakovlev: Asynchronous transient resilient links for NoC. CODES+ISSS 2008: 209-214 |
118 | EE | Simon Ogg, Enrico Valli, Bashir M. Al-Hashimi, Alexandre Yakovlev, Crescenzo D'Alessandro, Luca Benini: Serialized Asynchronous Links for NoC. DATE 2008: 1003-1008 |
117 | EE | Andrey Mokhov, Alexandre Yakovlev: Conditional Partial Order Graphs and Dynamically Reconfigurable Control Synthesis. DATE 2008: 1142-1147 |
116 | EE | Basel Halak, Alexandre Yakovlev: Bandwidth-Centric Optimisation for Area-Constrained Links with Crosstalk Avoidance Methods. DATE 2008: 438-443 |
115 | EE | Ashur Rafiev, Julian P. Murphy, Danil Sokolov, Alexandre Yakovlev: Conversion driven design of binary to mixed radix circuits. ICCD 2008: 410-415 |
114 | EE | Terrence S. T. Mak, Crescenzo D'Alessandro, N. Pete Sedcole, Peter Y. K. Cheung, Alexandre Yakovlev, Wayne Luk: Implementation of Wave-Pipelined Interconnects in FPGAs. NOCS 2008: 213-214 |
113 | EE | Philippe Darondeau, Maciej Koutny, Marta Pietkiewicz-Koutny, Alexandre Yakovlev: Synthesis of Nets with Step Firing Policies. Petri Nets 2008: 112-131 |
112 | EE | Josep Carmona, Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: A Symbolic Algorithm for the Synthesis of Bounded Petri Nets. Petri Nets 2008: 92-111 |
111 | EE | Terrence S. T. Mak, Crescenzo D'Alessandro, N. Pete Sedcole, Peter Y. K. Cheung, Alexandre Yakovlev, Wayne Luk: Global interconnections in FPGAs: modeling and performance analysis. SLIP 2008: 51-58 |
110 | EE | Basel Halak, Santosh Shedabale, Hiran Ramakrishnan, Alexandre Yakovlev, Gordon Russell: The impact of variability on the reliability of long on-chip interconnect in the presence of crosstalk. SLIP 2008: 65-72 |
109 | EE | Peter Y. K. Cheung, Alexandre Yakovlev: Comments on the BCS Lecture "The Future of Computer Technology and its Implications for the Computer Industry" by Professor Steve Furber. Comput. J. 51(6): 741-742 (2008) |
108 | EE | Victor Khomenko, Agnes Madalinski, Alexandre Yakovlev: Resolution of Encoding Conflicts by Signal Insertion and Concurrency Reduction Based on STG Unfoldings. Fundam. Inform. 86(3): 299-323 (2008) |
107 | EE | Danil Sokolov, Ivan Poliakov, Alexandre Yakovlev: Analysis of Static Data Flow Structures. Fundam. Inform. 88(4): 581-610 (2008) |
106 | EE | Basel Halak, Alexandre Yakovlev: Fault-Tolerant Techniques to Minimize the Impact of Crosstalk on Phase Encoded Communication Channels. IEEE Trans. Computers 57(4): 505-519 (2008) |
2007 | ||
105 | Jetty Kleijn, Alexandre Yakovlev: Petri Nets and Other Models of Concurrency - ICATPN 2007, 28th International Conference on Applications and Theory of Petri Nets and Other Models of Concurrency, ICATPN 2007, Siedlce, Poland, June 25-29, 2007, Proceedings Springer 2007 | |
104 | EE | Yuan Chen, Fei Xia, Delong Shang, Alexandre Yakovlev: The Design of Virtual Self-timed Block for Activity Communication in SOC. ACSD 2007: 100-109 |
103 | EE | Danil Sokolov, Ivan Poliakov, Alexandre Yakovlev: Asynchronous Data Path Models. ACSD 2007: 197-210 |
102 | EE | Crescenzo D'Alessandro, Andrey Mokhov, Alexandre V. Bystrov, Alexandre Yakovlev: Delay/Phase Regeneration Circuits. ASYNC 2007: 105-116 |
101 | EE | K. T. Gardiner, Alexandre Yakovlev, Alexandre V. Bystrov: A C-element Latch Scheme with Increased Transient Fault Tolerance for Asynchronous Circuits. IOLTS 2007: 223-230 |
100 | EE | Simon Ogg, Enrico Valli, Crescenzo D'Alessandro, Alexandre Yakovlev, Bashir M. Al-Hashimi, Luca Benini: Reducing Interconnect Cost in NoC through Serialized Asynchronous Links. NOCS 2007: 219 |
99 | EE | Crescenzo D'Alessandro, Nikolaos Minas, Keith Heron, David Kinniment, Alexandre Yakovlev: NoC Communication Strategies Using Time-to-Digital Conversion. NOCS 2007: 65-74 |
98 | EE | Delong Shang, Chi-Hoon Shin, Ping Wang, Fei Xia, Albert Koelmans, Myeong-Hoon Oh, Seongwoon Kim, Alexandre Yakovlev: Asynchronous Functional Coupling for Low Power Sensor Network Processors. PATMOS 2007: 53-63 |
97 | EE | Kyller Costa Gorgônio, Jordi Cortadella, Fei Xia, Alexandre Yakovlev: Automating Synthesis of Asynchronous Communication Mechanisms. Fundam. Inform. 78(1): 75-100 (2007) |
96 | EE | Delong Shang, Alexandre Yakovlev, Albert Koelmans, Danil Sokolov, Alexandre V. Bystrov: Registers for Phase Difference Based Logic. IEEE Trans. VLSI Syst. 15(6): 720-724 (2007) |
95 | EE | David Kinniment, Charles E. Dike, Keith Heron, Gordon Russell, Alexandre Yakovlev: Measuring Deep Metastability and Its Effect on Synchronizer Performance. IEEE Trans. VLSI Syst. 15(9): 1028-1039 (2007) |
94 | EE | Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev: Direct Mapping of Low-Latency Asynchronous Controllers From STGs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 993-1009 (2007) |
2006 | ||
93 | EE | Victor Khomenko, Agnes Madalinski, Alexandre Yakovlev: Resolution of Encoding Conflicts by Signal Insertion and Concurrency Reduction Based on STG Unfoldings. ACSD 2006: 57-68 |
92 | EE | Crescenzo D'Alessandro, Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev, Oleg V. Maevsky: Multiple-Rail Phase-Encoding for NoC. ASYNC 2006: 107-116 |
91 | EE | Delong Shang, Alexandre Yakovlev, Frank P. Burns, Fei Xia, Alexandre V. Bystrov: Low-Cost Online Testing of Asynchronous Handshakes. European Test Symposium 2006: 225-232 |
90 | EE | Yu Zhou, Danil Sokolov, Alexandre Yakovlev: Cost-aware synthesis of asynchronous circuits based on partial acknowledgement. ICCAD 2006: 158-163 |
89 | EE | Deepali Koppad, Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev: Online Testing by Protocol Decomposition. IOLTS 2006: 263-268 |
88 | EE | Yuan Chen, Fei Xia, Alexandre Yakovlev: Virtual self-timed blocks for systems-on-chip. ISCAS 2006 |
87 | EE | Jun Zhou, David Kinniment, Gordon Russell, Alexandre Yakovlev: A Robust Synchronizer. ISVLSI 2006: 442-443 |
86 | EE | Sohini Dasgupta, Dumitru Potop-Butucaru, Benoît Caillaud, Alexandre Yakovlev: Moving from Weakly Endochronous Systems to Delay-Insensitive Circuits. Electr. Notes Theor. Comput. Sci. 146(2): 81-103 (2006) |
85 | EE | Fei Xia, Fei Hao, Ian G. Clark, Alexandre Yakovlev, E. Graeme Chester: Buffered Asynchronous Communication Mechanisms. Fundam. Inform. 70(1-2): 155-170 (2006) |
84 | EE | Victor Khomenko, Maciej Koutny, Alexandre Yakovlev: Logic Synthesis for Asynchronous Circuits Based on STG Unfoldings and Incremental SAT. Fundam. Inform. 70(1-2): 49-73 (2006) |
2005 | ||
83 | EE | Jordi Cortadella, Kyller Costa Gorgônio, Fei Xia, Alexandre Yakovlev: Automating Synthesis of Asynchronous Communication Mechanisms. ACSD 2005: 166-175 |
82 | EE | Sohini Dasgupta, Alexandre Yakovlev: Modeling and Verification of Globally Asynchronous and Locally Synchronous Ring Architectures. DATE 2005: 568-569 |
81 | EE | Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev, Deepali Koppad: On-Line Testing of Globally Asynchronous Circuits. IOLTS 2005: 135-140 |
80 | EE | Julian Murphy, Alexandre V. Bystrov, Alexandre Yakovlev: Power-Balanced Self Checking Circuits for Cryptographic Chips. IOLTS 2005: 157-162 |
79 | EE | Crescenzo D'Alessandro, Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev: PSK Signalling on NoC Buses. PATMOS 2005: 286-296 |
78 | EE | Deepali Koppad, Alexandre V. Bystrov, Alexandre Yakovlev: Off-Line Testing of Asynchronous Circuits. VLSI Design 2005: 730-735 |
77 | EE | Danil Sokolov, Julian Murphy, Alexandre V. Bystrov, Alexandre Yakovlev: Design and Analysis of Dual-Rail Circuits for Security Applications. IEEE Trans. Computers 54(4): 449-460 (2005) |
2004 | ||
76 | EE | Victor Khomenko, Maciej Koutny, Alexandre Yakovlev: Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT. ACSD 2004: 16-25 |
75 | EE | Fei Xia, Fei Hao, Ian G. Clark, Alexandre Yakovlev, E. Graeme Chester: Buffered Asynchronous Communication Mechanisms. ACSD 2004: 36-46 |
74 | EE | Danil Sokolov, Julian Murphy, Alexandre V. Bystrov, Alexandre Yakovlev: Improving the Security of Dual-Rail Circuits. CHES 2004: 282-297 |
73 | EE | Frank P. Burns, Delong Shang, Albert Koelmans, Alexandre Yakovlev: An Asynchronous Synthesis Toolset Using Verilog. DATE 2004: 724-725 |
72 | Fei Hao, Fei Xia, E. Graeme Chester, Alexandre Yakovlev, Ian G. Clark: MATLAB Models of ACMS in Control Systems. ICINCO (3) 2004: 54-61 | |
71 | EE | D. J. Kinniment, Alexandre Yakovlev: Low Latency Synchronization Through Speculation. PATMOS 2004: 278-288 |
70 | EE | Delong Shang, Frank P. Burns, Alexandre V. Bystrov, Albert Koelmans, Danil Sokolov, Alexandre Yakovlev: A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits. PATMOS 2004: 471-480 |
69 | EE | Victor Khomenko, Maciej Koutny, Alexandre Yakovlev: Detecting State Encoding Conflicts in STG Unfoldings Using SAT. Fundam. Inform. 62(2): 221-241 (2004) |
68 | EE | Alexandre Yakovlev, Stephen B. Furber, René Krenz, Alexandre V. Bystrov: Design and Analysis of a Self-Timed Duplex Communication System. IEEE Trans. Computers 53(7): 798-814 (2004) |
2003 | ||
67 | EE | Victor Khomenko, Maciej Koutny, Alexandre Yakovlev: Detecting State Coding Conflicts in STG Unfoldings Using SAT. ACSD 2003: 51-60 |
66 | EE | Alexandre V. Bystrov, Danil Sokolov, Alexandre Yakovlev: Low-Latency Contro Structures with Slack. ASYNC 2003: 164-173 |
65 | EE | Nikolai Starodoubtsev, Sergei Bystrov, Alexandre Yakovlev: Monotonic Circuits with Complete Acknowledgement. ASYNC 2003: 98-108 |
64 | EE | Agnes Madalinski, Alexandre V. Bystrov, Victor Khomenko, Alexandre Yakovlev: Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design. DATE 2003: 10926-10931 |
63 | EE | Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev: STG Optimisation in the Direct Mapping of Asynchronous Circuits . DATE 2003: 10932-10939 |
62 | EE | Josep Carmona, Jordi Cortadella, Victor Khomenko, Alexandre Yakovlev: Synthesis of Asynchronous Hardware from Petri Nets. Lectures on Concurrency and Petri Nets 2003: 345-401 |
61 | EE | D. J. Kinniment, Oleh V. Maevsky, Alexandre V. Bystrov, Gordon Russell, Alexandre Yakovlev: On-chip structures for timing measurement and test. Microprocessors and Microsystems 27(9): 473-483 (2003) |
2002 | ||
60 | Jordi Cortadella, Alexandre Yakovlev, Grzegorz Rozenberg: Concurrency and Hardware Design, Advances in Petri Nets Springer 2002 | |
59 | EE | Alexandre V. Bystrov, Alexandre Yakovlev: Asynchronous Circuit Synthesis by Direct Mapping: Interfacing to Environment. ASYNC 2002: 127-136 |
58 | EE | D. J. Kinniment, Oleh V. Maevsky, Gordon Russell, Alexandre Yakovlev, Alexandre V. Bystrov: On-Chip Structures for Timing Measurements and Test. ASYNC 2002: 190- |
57 | EE | Alexandre V. Bystrov, Maciej Koutny, Alexandre Yakovlev: Visualization of Partial Order Models in VLSI Design Flow. DATE 2002: 1089 |
56 | EE | Victor Khomenko, Maciej Koutny, Alexandre Yakovlev: Detecting State Coding Conflicts in STGs Using Integer Programming. DATE 2002: 338-345 |
55 | EE | Alexandre Yakovlev: Is the Die Cast for the Token Game? ICATPN 2002: 70-79 |
54 | EE | Oleh V. Maevsky, D. J. Kinniment, Alexandre Yakovlev, Alexandre V. Bystrov: Analysis of the oscillation problem in tri-flops. ISCAS (1) 2002: 381-384 |
53 | EE | Delong Shang, Fei Xia, Alexandre Yakovlev: Asynchronous circuit synthesis via direct translation. ISCAS (3) 2002: 369-372 |
52 | Agnes Madalinski, Alexandre V. Bystrov, Alexandre Yakovlev: Visualization of Coding Conflicts in Asynchronous Circuit Design. IWLS 2002: 155-160 | |
51 | Alexandre V. Bystrov, Alexandre Yakovlev: Synthesis of Asynchronous Circuits with Predictable Latency. IWLS 2002: 239-243 | |
50 | EE | Jordi Cortadella, Alexandre Yakovlev, Jim D. Garside: Logic Design of Asynchronous Circuits (Tutorial Abstract). VLSI Design 2002: 26- |
49 | EE | Fei Xia, Alexandre Yakovlev, Ian G. Clark, Delong Shang: Data Communication in Systems with Heterogeneous Timing. IEEE Micro 22(6): 58-69 (2002) |
48 | EE | Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev: Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. IEEE Trans. on CAD of Integrated Circuits and Systems 21(2): 109-130 (2002) |
2001 | ||
47 | EE | Alexandre Yakovlev, Fei Xia, Delong Shang: Synthesis and Implementation of a Signal-Type Asynchronous Data Communication Mechanism. ASYNC 2001: 127- |
46 | Alan Burns, Andy J. Wellings, Frank P. Burns, Albert Koelmans, Maciej Koutny, Alexander B. Romanovsky, Alexandre Yakovlev: Modelling and verification of an atomic action protocol implemented in Ada. Comput. Syst. Sci. Eng. 16(3): 173-182 (2001) | |
2000 | ||
45 | EE | Alexandre V. Bystrov, D. J. Kinniment, Alexandre Yakovlev: Priority Arbiters. ASYNC 2000: 128-137 |
44 | EE | Fei Xia, Alexandre Yakovlev, Delong Shang, Alexandre V. Bystrov, Albert Koelmans, D. J. Kinniment: Asynchronous Communication Mechanisms Using Self-Timed Circuits. ASYNC 2000: 150- |
43 | EE | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: Hardware and Petri Nets: Application to Asynchronous Circuit Design. ICATPN 2000: 1-15 |
42 | EE | Nikolai Starodoubtsev, Alexandre V. Bystrov, Alexandre Yakovlev: Semi-modular Latch Chains for Asynchronous Circuit Design. PATMOS 2000: 168-177 |
41 | EE | David Kinniment, Alexandre Yakovlev, B. Gao: Synchronous and asynchronous A-D conversion. IEEE Trans. VLSI Syst. 8(2): 217-220 (2000) |
40 | Frank P. Burns, Albert Koelmans, Alexandre Yakovlev: WCET Analysis of Superscalar Processors Using Simulation With Coloured Petri Nets. Real-Time Systems 18(2/3): 275-288 (2000) | |
1999 | ||
39 | EE | Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev: Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. DAC 1999: 110-115 |
38 | EE | Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev: What is the cost of delay insensitivity? ICCAD 1999: 316-323 |
37 | EE | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev: Decomposition and technology mapping of speed-independent circuits using Boolean relations. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1221-1236 (1999) |
1998 | ||
36 | EE | Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev: Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings. ACSD 1998: 152- |
35 | EE | D. J. Kinniment, Alexandre Yakovlev, Fei Xia, B. Gao: Towards Asynchronous A-D Conversion. ASYNC 1998: 206-215 |
34 | EE | Walter Vogler, Alexei L. Semenov, Alexandre Yakovlev: Unfolding and Finite Prefix for Nets with Read Arcs. CONCUR 1998: 501-516 |
33 | EE | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev: Lazy transition systems: application to timing optimization of asynchronous circuits. ICCAD 1998: 324-331 |
32 | Alexandre Yakovlev: Designing Control Logic for Counterflow Pipeline Processor Using Petri Nets. Formal Methods in System Design 12(1): 39-71 (1998) | |
31 | Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev: Deriving Petri Nets for Finite Transition Systems. IEEE Trans. Computers 47(8): 859-882 (1998) | |
30 | EE | Alex Kondratyev, Michael Kishinevsky, Alexandre Yakovlev: Hazard-free implementation of speed-independent circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 17(9): 749-771 (1998) |
29 | EE | Frank P. Burns, Albert Koelmans, Alexandre Yakovlev: Analysing Superscalar Processor Architectures with Coloured Petri Nets. STTT 2(2): 182-191 (1998) |
1997 | ||
28 | EE | Alex Kondratyev, Michael Kishinevsky, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev: Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis. ASYNC 1997: 240-253 |
27 | EE | Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella, Luciano Lavagno: Partial order based approach to synthesis of speed-independent circuits. ASYNC 1997: 254- |
26 | EE | Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella: Synthesis of Speed-Independent Circuits from STG-Unfolding Segment. DAC 1997: 16-21 |
25 | EE | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis. ED&TC 1997: 98-105 |
24 | Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev: Coupling Asynchrony and Interrupts: Place Chart Nets. ICATPN 1997: 328-347 | |
23 | EE | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev: Decomposition and technology mapping of speed-independent circuits using Boolean relations. ICCAD 1997: 220-227 |
22 | EE | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: A region-based theory for state assignment in speed-independent circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 793-812 (1997) |
1996 | ||
21 | EE | Alexei L. Semenov, Alexandre Yakovlev: Verification of asynchronous circuits using Time Petri Net unfolding. DAC 1996: 59-62 |
20 | EE | Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev: Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis. DAC 1996: 63-66 |
19 | Alexandre Yakovlev, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli: A Unified Signal Transition Graph Model for Asynchronous Control Circuit Synthesis. Formal Methods in System Design 9(3): 139-188 (1996) | |
18 | Alexandre Yakovlev, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Marta Pietkiewicz-Koutny: On the Models for Asynchronous Circuit Behaviour with OR Causality. Formal Methods in System Design 9(3): 189-233 (1996) | |
17 | EE | Alexandre Yakovlev, Albert Koelmans, Alexei L. Semenov, D. J. Kinniment: Modelling, analysis and synthesis of asynchronous control circuits using Petri nets. Integration 21(3): 143-170 (1996) |
1995 | ||
16 | EE | Alex Kondratyev, Michael Kishinevsky, Alexandre Yakovlev: On hazard-free implementation of speed-independent circuits. ASP-DAC 1995 |
15 | EE | Alexandre Yakovlev, Victor Varshavsky, Vyacheslav Marakhovsky, Alexei L. Semenov: Designing an asynchronous pipeline token ring interface. ASYNC 1995: 32- |
14 | EE | Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev: Synthesizing Petri nets from state-based models. ICCAD 1995: 164-171 |
13 | EE | Alexandre Yakovlev, Albert Koelmans, Luciano Lavagno: High-Level Modeling and Design of Asynchronous Interface Logic. IEEE Design & Test of Computers 12(1): 32-40 (1995) |
1994 | ||
12 | Alexandre Yakovlev, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno: OR Causality: Modelling and Hardware Implementation. Application and Theory of Petri Nets 1994: 568-587 | |
11 | EE | Alex Kondratyev, Michael Kishinevsky, Bill Lin, Peter Vanbekbergen, Alexandre Yakovlev: Basic Gate Implementation of Speed-Independent Circuits. DAC 1994: 56-62 |
10 | EE | Alexandre Yakovlev, A. Petrov, Luciano Lavagno: A low latency asynchronous arbitration circuit. IEEE Trans. VLSI Syst. 2(3): 372-377 (1994) |
1993 | ||
9 | Alexandre Yakovlev, A. I. Petrov, Leonid Ya. Rosenblum: Synthesis of Asynchronous Control Circuits from Symbolic Signal Transition Graphs. Asynchronous Design Methodologies 1993: 71-85 | |
8 | Alexandre Yakovlev: Synthesis of Hazard-free Asynchronous Circuits from Generalized Signal-Transition Graphs. VLSI Design 1993: 21-24 | |
1992 | ||
7 | Alexandre Yakovlev: A Structural Technique For Fault-Protection in Asynchronous Interfaces. FTCS 1992: 288-295 | |
6 | EE | Alexandre Yakovlev, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli: A unified signal transition graph model for asynchronous control circuit synthesis. ICCAD 1992: 104-111 |
5 | Alexandre Yakovlev: On Limitations and Extensions of STG Model for Designing Asynchronous Control Circuits. ICCD 1992: 396-400 | |
1989 | ||
4 | Leonid Ya. Rosenblum, Alexandre Yakovlev: Analyzing Semantics of Concurrent Hardware Specifications. ICPP (3) 1989: 211-218 | |
3 | Leonid Ya. Rosenblum, Alexandre Yakovlev, Vladimir Yakovlev: A look at concurrency semantics through "lattice glasses". Bulletin of the EATCS 37: 175-180 (1989) | |
1988 | ||
2 | Alex Kondratyev, Leonid Ya. Rosenblum, Alexandre Yakovlev: Signal Graphs: A Model for Designing Concurrent Logic. ICPP (1) 1988: 51-54 | |
1985 | ||
1 | Leonid Ya. Rosenblum, Alexandre Yakovlev: Signal Graphs: From Self-Timed to Timed Ones. PNPM 1985: 199-206 |