Michalis D. Galanis

2009
50	EE	Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis: Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays. The Journal of Supercomputing 48(2): 115-151 (2009)
2008
49	EE	Michalis D. Galanis, Costas E. Goutis: Speedups from extending embedded processors with a high-performance coarse-grained reconfigurable data-path. Journal of Systems Architecture - Embedded Systems Design 54(5): 479-490 (2008)
48	EE	Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis: Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path. Signal Processing Systems 50(2): 179-200 (2008)
2007
47	EE	Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis: Compiler assisted architectural exploration for coarse grained reconfigurable arrays. ACM Great Lakes Symposium on VLSI 2007: 164-167
46	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path. ACM Great Lakes Symposium on VLSI 2007: 2-7
45	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Nikos Kostaras, Costas E. Goutis: A unified evaluation framework for coarse grained reconfigurable array architectures. Conf. Computing Frontiers 2007: 161-172
44	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path. IPDPS 2007: 1-8
43	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform. PATMOS 2007: 352-362
42	EE	Michalis D. Galanis, Gregory Dimitroulakos, Spyros Tragoudas, Costas E. Goutis: Speedups in embedded systems with a high-performance coprocessor datapath. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
41	EE	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms CoRR abs/0710.4844: (2007)
40	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System. IEEE Trans. VLSI Syst. 15(12): 1362-1366 (2007)
39	EE	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: Automated framework for partitioning DSP applications in hybrid reconfigurable platforms. Microprocessors and Microsystems 31(1): 1-14 (2007)
38	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path. The Journal of Supercomputing 39(3): 251-271 (2007)
37	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture. The Journal of Supercomputing 40(2): 127-157 (2007)
2006
36	EE	Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis: Performance Improvements in Microprocessor Systems Utilizing a Copressor Data-Path. ICSAMOS 2006: 85-92
35	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis: Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic. IPDPS 2006
34	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis: Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures. IPDPS 2006
33	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis: Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware. IPDPS 2006
32	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis: Mapping DSP applications on processor/coarse-grain reconfigurable array architectures. ISCAS 2006
31	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis: Resource constrained modulo scheduling for coarse-grained reconfigurable arrays. ISCAS 2006
30	EE	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Constantinos E. Goutis: A high-performance data path for synthesizing DSP kernels. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1154-1162 (2006)
29	EE	Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou: Architectures and FPGA Implementations of the 64-Bit MISTY1 Block Cipher. Journal of Circuits, Systems, and Computers 15(6): 817-831 (2006)
28	EE	Michalis D. Galanis, Athanasios Milidonis, Athanasios Kakarountas, Costas E. Goutis: A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems. Microelectronics Journal 37(6): 554-564 (2006)
27	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs. The Journal of Supercomputing 35(2): 185-199 (2006)
26	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Partitioning Methodology for Heterogeneous Reconfigurable Functional Units. The Journal of Supercomputing 38(1): 17-34 (2006)
2005
25	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays. ASAP 2005: 161-168
24	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware. ASAP 2005: 50-59
23	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems. FCCM 2005: 301-302
22		Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Performance Improvements using Coarse-Grain Reconfigurable Logic in Embedded SoCs. FPL 2005: 630-635
21	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures. IPDPS 2005
20	EE	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms. IPDPS 2005
19	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis, Athanasios Milidonis: A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard. ISCAS (1) 2005: 472-475
18	EE	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A methodology for partitioning DSP applications in hybrid reconfigurable systems. ISCAS (2) 2005: 1206-1209
17	EE	Michalis D. Galanis, Gregory Dimitroulakos, Constantinos E. Goutis: An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays. ISCAS (4) 2005: 3519-3522
16	EE	Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou: A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher. ISCAS (5) 2005: 4641-4644
15	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Performance Gains from Partitioning Embedded Applications in Processor-FPGA SoCs. PATMOS 2005: 247-256
14	EE	Michalis D. Galanis, Paris Kitsos, Giorgos Kostopoulos, Nicolas Sklavos, Constantinos E. Goutis: Comparison of the Hardware Implementation of Stream Ciphers. Int. Arab J. Inf. Technol. 2(4): 267-274 (2005)
13	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Athanasios Milidonis, Constantinos E. Goutis: A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000. Integration 39(1): 1-11 (2005)
12	EE	Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou: An Fpga Implementation of the Gprs Encryption Algorithm 3 (gea3). Journal of Circuits, Systems, and Computers 14(2): 217-232 (2005)
11	EE	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Constantinos E. Goutis: A Reconfigurable Coarse-grain Data-path for Accelerating Computational Intensive Kernels. Journal of Circuits, Systems, and Computers 14(4): 877-893 (2005)
2004
10	EE	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms. DATE 2004: 247-252
9	EE	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms. DATE 2004: 247-252
8	EE	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis: Accelerating DSP Applications on a Mixed Granularity Platform with a New Reconfigurable Coarse-Grain Data-Path. FCCM 2004: 275-276
7	EE	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis: A novel coarse-grain reconfigurable data-path for accelerating DSP kernels. FPGA 2004: 252
6	EE	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis: Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path. FPL 2004: 868-873
5		Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou: High-speed hardware implementations of the KASUMI block cipher. ISCAS (2) 2004: 549-552
4	EE	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis: Mapping Computational Intensive Applications to a New Coarse-Grained Reconfigurable Data-Path. PATMOS 2004: 652-661
3	EE	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis: A Novel Data-Path for Accelerating DSP Kernels. SAMOS 2004: 363-372
2	EE	Athanasios Milidonis, Grigoris Dimitroulakos, Michalis D. Galanis, George Theodoridis, Constantinos E. Goutis, Francky Catthoor: An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications. SCOPES 2004: 122-136
1	EE	Paris Kitsos, Nicolas Sklavos, Michalis D. Galanis, Odysseas G. Koufopavlou: 64-bit Block ciphers: hardware implementations and comparison analysis. Computers & Electrical Engineering 30(8): 593-604 (2004)

Coauthor Index

1	Francky Catthoor	[2]
2	Gregory Dimitroulakos	[17] [36] [42] [48]
3	Grigoris Dimitroulakos	[2] [13] [15] [19] [21] [22] [23] [24] [25] [26] [27] [31] [32] [33] [34] [35] [37] [38] [40] [43] [44] [45] [46] [47] [50]
4	Constantinos E. Goutis (Costas E. Goutis)	[2] [3] [4] [6] [7] [8] [9] [10] [11] [13] [14] [15] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50]
5	Athanasios Kakarountas	[28]
6	Paris Kitsos	[1] [5] [12] [14] [16] [29]
7	Nikos Kostaras	[45] [47] [50]
8	Giorgos Kostopoulos	[14]
9	Odysseas G. Koufopavlou	[1] [5] [12] [16] [29]
10	Athanasios Milidonis	[2] [9] [10] [13] [18] [19] [20] [28] [39] [41]
11	Nicolas Sklavos	[1] [14]
12	Dimitrios Soudris (D. J. Soudris)	[3] [4] [6] [7] [8] [9] [10] [18] [20] [39] [41]
13	George Theodoridis	[2] [3] [4] [6] [7] [8] [9] [10] [11] [18] [20] [30] [39] [41]
14	Spyros Tragoudas	[3] [4] [6] [7] [8] [11] [30] [42]