Kedarnath J. Balakrishnan

2008
17	EE	Seongmoon Wang, Kedarnath J. Balakrishnan, Wenlong Wei: X-Block: An Efficient LFSR Reseeding-Based Method to Block Unknowns for Temporal Compactors. IEEE Trans. Computers 57(7): 978-989 (2008)
2007
16	EE	Quming Zhou, Kedarnath J. Balakrishnan: Test cost reduction for SoC using a combined approach to test data compression and test scheduling. DATE 2007: 39-44
15	EE	Kedarnath J. Balakrishnan: Efficient Scan-Based BIST Using Multiple LFSRs and Dictionary Coding. VLSI Design 2007: 345-350
14	EE	Kedarnath J. Balakrishnan, Lei Fang: RTL Test Point Insertion to Reduce Delay Test Volume. VTS 2007: 325-332
13	EE	Kedarnath J. Balakrishnan, Nur A. Touba: Relationship Between Entropy and Test Data Compression. IEEE Trans. on CAD of Integrated Circuits and Systems 26(2): 386-395 (2007)
2006
12	EE	Seongmoon Wang, Kedarnath J. Balakrishnan, Srimat T. Chakradhar: Efficient unknown blocking using LFSR reseeding. DATE 2006: 1051-1052
11	EE	Kedarnath J. Balakrishnan, Seongmoon Wang, Srimat T. Chakradhar: PIDISC: Pattern Independent Design Independent Seed Compression Technique. VLSI Design 2006: 811-817
10	EE	Kedarnath J. Balakrishnan, Nur A. Touba: Improving Linear Test Data Compression. IEEE Trans. VLSI Syst. 14(11): 1227-1237 (2006)
2005
9	EE	Kedarnath J. Balakrishnan, Nur A. Touba, Srinivas Patil: Compressing Functional Tests for Microprocessors. Asian Test Symposium 2005: 428-433
8	EE	Kedarnath J. Balakrishnan: Emerging Techniques for Test Data Compression. Asian Test Symposium 2005: 462
7	EE	Kedarnath J. Balakrishnan, Nur A. Touba: Reconfigurable Linear Decompressors Using Symbolic Gaussian Elimination. DATE 2005: 1130-1135
2004
6	EE	Seongmoon Wang, Srimat T. Chakradhar, Kedarnath J. Balakrishnan: Re-configurable embedded core test protocol. ASP-DAC 2004: 234-237
5	EE	Kedarnath J. Balakrishnan, Nur A. Touba: Improving Encoding Efficiency for Linear Decompressors Using Scan Inversion. ITC 2004: 936-944
4	EE	Kedarnath J. Balakrishnan, Nur A. Touba: Matrix-based software test data decompression for systems-on-a-chip. Journal of Systems Architecture 50(5): 247-256 (2004)
2003
3	EE	Kedarnath J. Balakrishnan, Nur A. Touba: Scan-Based BIST Diagnosis Using an Embedded Processor. DFT 2003: 209-216
2	EE	Kedarnath J. Balakrishnan, Nur A. Touba: Deterministic Test Vector Decompression in Software Using Linear Operations. VTS 2003: 225-231
2002
1	EE	Kedarnath J. Balakrishnan, Nur A. Touba: Matrix-Based Test Vector Decompression Using an Embedded Processor. DFT 2002: 159-165

Coauthor Index

1	Srimat T. Chakradhar	[6] [11] [12]
2	Lei Fang	[14]
3	Srinivas Patil	[9]
4	Nur A. Touba	[1] [2] [3] [4] [5] [7] [9] [10] [13]
5	Seongmoon Wang	[6] [11] [12] [17]
6	Wenlong Wei	[17]
7	Quming Zhou	[16]

Colors in the list of coauthors