Aarti Gupta

2009
80	EE	Vineet Kahlon, Sriram Sankaranarayanan, Aarti Gupta: Semantic Reduction of Thread Interleavings in Concurrent Programs. TACAS 2009: 124-138
79	EE	Aarti Gupta: Model Checking Concurrent Programs. VMCAI 2009: 2
78	EE	Zijiang Yang, Chao Wang, Aarti Gupta, Franjo Ivancic: Model checking sequential software programs via mixed symbolic analysis. ACM Trans. Design Autom. Electr. Syst. 14(1): (2009)
2008
77		Aarti Gupta, Sharad Malik: Computer Aided Verification, 20th International Conference, CAV 2008, Princeton, NJ, USA, July 7-14, 2008, Proceedings Springer 2008
76	EE	Chao Wang, Yu Yang, Aarti Gupta, Ganesh Gopalakrishnan: Dynamic Model Checking with Property Driven Pruning to Detect Race Conditions. ATVA 2008: 126-140
75	EE	Malay K. Ganai, Aarti Gupta: Tunneling and slicing: towards scalable BMC. DAC 2008: 137-142
74	EE	Malay K. Ganai, Aarti Gupta: Completeness in SMT-based BMC for Software Programs. DATE 2008: 831-836
73	EE	Sriram Sankaranarayanan, Franjo Ivancic, Aarti Gupta: Mining library specifications using inductive logic programming. ICSE 2008: 131-140
72	EE	Aarti Gupta: Software Verification: Roles and Challenges for Automatic Decision Procedures. IJCAR 2008: 1
71	EE	Sriram Sankaranarayanan, Swarat Chaudhuri, Franjo Ivancic, Aarti Gupta: Dynamic inference of likely data preconditions over predicates by tree learning. ISSTA 2008: 295-306
70	EE	Gogul Balakrishnan, Sriram Sankaranarayanan, Franjo Ivancic, Ou Wei, Aarti Gupta: SLR: Path-Sensitive Analysis through Infeasible-Path Detection and Syntactic Language Refinement. SAS 2008: 238-254
69	EE	Fang Yu, Chao Wang, Aarti Gupta, Tevfik Bultan: Modular verification of web services using efficient symbolic encoding and summarization. SIGSOFT FSE 2008: 192-202
68	EE	Malay K. Ganai, Aarti Gupta: Efficient Modeling of Concurrent Systems in BMC. SPIN 2008: 114-133
67	EE	Chao Wang, Zijiang Yang, Vineet Kahlon, Aarti Gupta: Peephole Partial Order Reduction. TACAS 2008: 382-396
66	EE	Aleksandr Zaks, Zijiang Yang, Ilya Shlyakhter, Franjo Ivancic, Srihari Cadambi, Malay K. Ganai, Aarti Gupta, Pranav Ashar: Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking. IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1513-1517 (2008)
65	EE	Franjo Ivancic, Zijiang Yang, Malay K. Ganai, Aarti Gupta, Pranav Ashar: Efficient SAT-based bounded model checking for software verification. Theor. Comput. Sci. 404(3): 256-274 (2008)
2007
64	EE	Malay K. Ganai, Aarti Gupta: Efficient BMC for Multi-Clock Systems with Clocked Specifications. ASP-DAC 2007: 310-315
63	EE	Vineet Kahlon, Yu Yang, Sriram Sankaranarayanan, Aarti Gupta: Fast and Accurate Static Data-Race Detection for Concurrent Programs. CAV 2007: 226-239
62	EE	Chao Wang, Zijiang Yang, Aarti Gupta, Franjo Ivancic: Using Counterexamples for Improving the Precision of Reachability Computation with Polyhedra. CAV 2007: 352-365
61	EE	Chao Wang, Aarti Gupta, Franjo Ivancic: Induction in CEGAR for Detecting Counterexamples. FMCAD 2007: 77-84
60	EE	Aarti Gupta: From Hardware Verification to Software Verification: Re-use and Re-learn. Haifa Verification Conference 2007: 14-15
59	EE	Chao Wang, Hyondeuk Kim, Aarti Gupta: Hybrid CEGAR: combining variable hiding and predicate abstraction. ICCAD 2007: 310-317
58	EE	Aarti Gupta, Tim Oates: Using Ontologies and the Web to Learn Lexical Semantics. IJCAI 2007: 1618-1623
57	EE	Vineet Kahlon, Aarti Gupta: On the analysis of interacting pushdown systems. POPL 2007: 303-314
56	EE	Sriram Sankaranarayanan, Franjo Ivancic, Aarti Gupta: Program Analysis Using Symbolic Ranges. SAS 2007: 366-383
55	EE	Malay K. Ganai, Akira Mukaiyama, Aarti Gupta, Kazutoshi Wakabayashi: Synthesizing "Verification Aware" Models: Why and How? VLSI Design 2007: 50-56
54	EE	Chao Wang, Zijiang Yang, Franjo Ivancic, Aarti Gupta: Disjunctive image computation for software verification. ACM Trans. Design Autom. Electr. Syst. 12(2): (2007)
53	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Verification of Embedded Memory Systems using Efficient Memory Modeling CoRR abs/0710.4666: (2007)
52	EE	Malay K. Ganai, Muralidhar Talupur, Aarti Gupta: SDSAT: Tight Integration of Small Domain Encoding and Lazy Approaches in Solving Difference Logic. JSAT 3(1-2): 91-114 (2007)
2006
51	EE	Chao Wang, Zijiang Yang, Franjo Ivancic, Aarti Gupta: Whodunit? Causal Analysis for Counterexamples. ATVA 2006: 82-95
50	EE	Himanshu Jain, Franjo Ivancic, Aarti Gupta, Ilya Shlyakhter, Chao Wang: Using Statically Computed Invariants Inside the Predicate Abstraction and Refinement Loop. CAV 2006: 137-151
49	EE	Vineet Kahlon, Aarti Gupta, Nishant Sinha: Symbolic Model Checking of Concurrent Programs Using Partial Orders and On-the-Fly Transactions. CAV 2006: 286-299
48	EE	Chao Wang, Aarti Gupta, Malay K. Ganai: Predicate learning and selective theory deduction for a difference logic solver. DAC 2006: 235-240
47	EE	Chao Wang, Zijiang Yang, Franjo Ivancic, Aarti Gupta: Disjunctive image computation for embedded software verification. DATE 2006: 1205-1210
46	EE	Malay K. Ganai, Aarti Gupta: Accelerating high-level bounded model checking. ICCAD 2006: 794-801
45	EE	Vineet Kahlon, Aarti Gupta: An Automata-Theoretic Approach for Model Checking Threads for LTL Propert. LICS 2006: 101-110
44	EE	Zijiang Yang, Chao Wang, Aarti Gupta, Franjo Ivancic: Mixed symbolic representations for model checking software programs. MEMOCODE 2006: 17-26
43	EE	Sriram Sankaranarayanan, Franjo Ivancic, Ilya Shlyakhter, Aarti Gupta: Static Analysis in Disjunctive Numerical Domains. SAS 2006: 3-17
42	EE	Aarti Gupta, Malay K. Ganai, Chao Wang: SAT-Based Verification Methods and Applications in Hardware Verification. SFM 2006: 108-143
41	EE	Malay K. Ganai, Muralidhar Talupur, Aarti Gupta: SDSAT: Tight Integration of Small Domain Encoding and Lazy Approaches in a Separation Logic Solver. TACAS 2006: 135-150
40	EE	Malay K. Ganai, Aarti Gupta, Zijiang Yang, Pranav Ashar: Efficient distributed SAT and SAT-based distributed Bounded Model Checking. STTT 8(4-5): 387-396 (2006)
2005
39	EE	Daijue Tang, Sharad Malik, Aarti Gupta, C. Norris Ip: Symmetry Reduction in SAT-Based Model Checking. CAV 2005: 125-138
38	EE	Franjo Ivancic, Zijiang Yang, Malay K. Ganai, Aarti Gupta, Ilya Shlyakhter, Pranav Ashar: F-Soft: Software Verification Platform. CAV 2005: 301-306
37	EE	Vineet Kahlon, Franjo Ivancic, Aarti Gupta: Reasoning About Threads Communicating via Locks. CAV 2005: 505-518
36	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Beyond safety: customized SAT-based model checking. DAC 2005: 738-743
35	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Verification of Embedded Memory Systems using Efficient Memory Modeling. DATE 2005: 1096-1101
34	EE	Franjo Ivancic, Ilya Shlyakhter, Aarti Gupta, Malay K. Ganai: Model Checking C Programs Using F-SOFT. ICCD 2005: 297-308
33	EE	Chao Wang, Franjo Ivancic, Malay K. Ganai, Aarti Gupta: Deciding Separation Logic Formulae by SAT and Incremental Negative Cycle Elimination. LPAR 2005: 322-336
32	EE	Himanshu Jain, Franjo Ivancic, Aarti Gupta, Malay K. Ganai: Localization and Register Sharing for Predicate Abstraction. TACAS 2005: 397-412
31	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: DiVer: SAT-Based Model Checking Platform for Verifying Large Scale Systems. TACAS 2005: 575-580
30	EE	Aarti Gupta, Malay K. Ganai, Pranav Ashar: Lazy Constraints and SAT Heuristics for Proof-Based Abstraction. VLSI Design 2005: 183-188
29		Aarti Gupta, Ali Alphan Bayazit, Yogesh S. Mahajan: Verification Languages. The Industrial Information Technology Handbook 2005: 1-18
28	EE	Mukul R. Prasad, Armin Biere, Aarti Gupta: A survey of recent advances in SAT-based formal verification. STTT 7(2): 156-173 (2005)
2004
27	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Efficient Modeling of Embedded Memories in Bounded Model Checking. CAV 2004: 440-452
26	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Efficient SAT-based unbounded symbolic model checking using circuit cofactoring. ICCAD 2004: 510-517
25		Pranav Ashar, Malay K. Ganai, Aarti Gupta, Franjo Ivancic, Zijiang Yang: Efficient SAT-based Bounded Model Checking for Software Verification. ISoLA (Preliminary proceedings) 2004: 157-164
2003
24	EE	Aarti Gupta, Malay K. Ganai, Chao Wang, Zijiang Yang, Pranav Ashar: Abstraction and BDDs Complement SAT-Based BMC in DiVer. CAV 2003: 206-209
23	EE	Malay K. Ganai, Aarti Gupta, Zijiang Yang, Pranav Ashar: Efficient Distributed SAT and SAT-Based Distributed Bounded Model Checking. CHARME 2003: 334-347
22	EE	Aarti Gupta, Malay K. Ganai, Chao Wang, Zijiang Yang, Pranav Ashar: Learning from BDDs in SAT-based bounded model checking. DAC 2003: 824-829
21	EE	Aarti Gupta, Malay K. Ganai, Zijiang Yang, Pranav Ashar: Iterative Abstraction using SAT-based BMC with Proof Analysis. ICCAD 2003: 416-423
2002
20	EE	Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao Zhang, Sharad Malik: Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver. DAC 2002: 747-750
19	EE	Aarti Gupta, Albert E. Casavant, Pranav Ashar, X. G. Liu, Akira Mukaiyama, Kazutoshi Wakabayashi: Property-Specific Testbench Generation for Guided Simulation. VLSI Design 2002: 524-
18	EE	Aarti Gupta: Assertion-based verification turns the corner. IEEE Design & Test of Computers 19(4): 131-132 (2002)
2001
17	EE	Aarti Gupta, Anubhav Gupta, Zijiang Yang, Pranav Ashar: Dynamic Detection and Removal of Inactive Clauses in SAT with Application in Image Computation. DAC 2001: 536-541
16	EE	Albert E. Casavant, Aarti Gupta, S. Liu, Akira Mukaiyama, Kazutoshi Wakabayashi, Pranav Ashar: Property-specific witness graph generation for guided simulation. DATE 2001: 799
15	EE	Aarti Gupta, Zijiang Yang, Pranav Ashar, Lintao Zhang, Sharad Malik: Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs. ICCAD 2001: 286-292
14	EE	Pranav Ashar, Aarti Gupta, Sharad Malik: Using complete-1-distinguishability for FSM equivalence checking. ACM Trans. Design Autom. Electr. Syst. 6(4): 569-590 (2001)
2000
13	EE	Aarti Gupta, Zijiang Yang, Pranav Ashar, Anubhav Gupta: SAT-Based Image Computation with Application in Reachability Analysis. FMCAD 2000: 354-371
12	EE	Aarti Gupta, Pranav Ashar: Fast Error Diagnosis for Combinational Verification. VLSI Design 2000: 442-448
1999
11	EE	Aarti Gupta, Pranav Ashar, Sharad Malik: Exploiting Retiming in a Guided Simulation Based Validation Methodology. CHARME 1999: 350-353
10	EE	Pranav Ashar, Anand Raghunathan, Aarti Gupta, Subhrajit Bhattacharya: Verification of Scheduling in the Presence of Loops Using Uninterpreted Symbolic Simulation. ICCD 1999: 458-466
1998
9	EE	Aarti Gupta, Pranav Ashar: Integrating a Boolean Satisfiability Checker and BDDs for Combinational Equivalence Checking. VLSI Design 1998: 222-225
1997
8	EE	Aarti Gupta, Sharad Malik, Pranav Ashar: Toward Formalizing a Validation Methodology Using Simulation Coverage. DAC 1997: 740-745
1996
7	EE	Pranav Ashar, Aarti Gupta, Sharad Malik: Using complete-1-distinguishability for FSM equivalence checking. ICCAD 1996: 346-353
1994
6		Aarti Gupta, Allan L. Fisher: Tradeoffs in Canonical Sequential Function Representations. ICCD 1994: 111-116
1993
5		Aarti Gupta, Allan L. Fisher: Parametric Circuit Representation Using Inductive Boolean Functions. CAV 1993: 15-28
4	EE	Aarti Gupta, Allan L. Fisher: Representation and symbolic manipulation of linearly inductive Boolean functions. ICCAD 1993: 192-199
1992
3		Aarti Gupta: Formal Hardware Verification Methods: A Survey. Formal Methods in System Design 1(2/3): 151-238 (1992)
1990
2		Aarti Gupta, Allan L. Fisher: Flexible Parallel Polygon Rendering. ICPP (3) 1990: 87-91
1986
1		Moon-Jung Chung, Edward J. Toy, Aarti Gupta: A Parallel Computer Based on Cube-Connected Cycles for Wafer-Scale. FJCC 1986: 325-334

Coauthor Index

1	Pranav Ashar	[7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [19] [20] [21] [22] [23] [24] [25] [26] [27] [30] [31] [35] [36] [38] [40] [53] [65] [66]
2	Gogul Balakrishnan	[70]
3	Ali Alphan Bayazit	[29]
4	Subhrajit Bhattacharya	[10]
5	Armin Biere	[28]
6	Tevfik Bultan	[69]
7	Srihari Cadambi	[66]
8	Albert E. Casavant	[16] [19]
9	Swarat Chaudhuri	[71]
10	Moon-Jung Chung	[1]
11	Allan L. Fisher	[2] [4] [5] [6]
12	Malay K. Ganai	[20] [21] [22] [23] [24] [25] [26] [27] [30] [31] [32] [33] [34] [35] [36] [38] [40] [41] [42] [46] [48] [52] [53] [55] [64] [65] [66] [68] [74] [75]
13	Ganesh Gopalakrishnan	[76]
14	Anubhav Gupta	[13] [17]
15	C. Norris Ip	[39]
16	Franjo Ivancic	[25] [32] [33] [34] [37] [38] [43] [44] [47] [50] [51] [54] [56] [61] [62] [65] [66] [70] [71] [73] [78]
17	Himanshu Jain	[32] [50]
18	Vineet Kahlon	[37] [45] [49] [57] [63] [67] [80]
19	Hyondeuk Kim	[59]
20	S. Liu	[16]
21	X. G. Liu	[19]
22	Yogesh S. Mahajan	[29]
23	Sharad Malik	[7] [8] [11] [14] [15] [20] [39] [77]
24	Akira Mukaiyama	[16] [19] [55]
25	Tim Oates	[58]
26	Mukul R. Prasad	[28]
27	Anand Raghunathan	[10]
28	Sriram Sankaranarayanan	[43] [56] [63] [70] [71] [73] [80]
29	Ilya Shlyakhter	[34] [38] [43] [50] [66]
30	Nishant Sinha	[49]
31	Muralidhar Talupur	[41] [52]
32	Daijue Tang	[39]
33	Edward J. Toy	[1]
34	Kazutoshi Wakabayashi	[16] [19] [55]
35	Chao Wang	[22] [24] [33] [42] [44] [47] [48] [50] [51] [54] [59] [61] [62] [67] [69] [76] [78]
36	Ou Wei	[70]
37	Yu Yang	[63] [76]
38	Zijiang Yang	[13] [15] [17] [21] [22] [23] [24] [25] [38] [40] [44] [47] [51] [54] [62] [65] [66] [67] [78]
39	Fang Yu	[69]
40	Aleksandr Zaks	[66]
41	Lintao Zhang	[15] [20]

Colors in the list of coauthors