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Pierre Bomel

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2009
14EEPierre Bomel, Jeremie Crenne, Linfeng Ye, Jean-Philippe Diguet, Guy Gogniat: Ultra-Fast Downloading of Partial Bitstreams through Ethernet. ARCS 2009: 72-83
2008
13EEPierre Bomel, Guy Gogniat, Jean-Philippe Diguet: A Networked, Lightweight and Partially Reconfigurable Platform. ARC 2008: 314-319
12EEPierre Bomel, Jean-Philippe Diguet, Guy Gogniat, Jeremie Crenne: Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems. ISPDC 2008: 228-234
2007
11EEPierre Bomel, Eric Martin, Emmanuel Boutillon: Synchronization Processor Synthesis for Latency Insensitive Systems CoRR abs/0710.4659: (2007)
10EEPhilippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin: Constrained algorithmic IP design for system-on-chip. Integration 40(2): 94-105 (2007)
2006
9EEPhilippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin: A formal method for hardware IP design and integration under I/O and timing constraints. ACM Trans. Embedded Comput. Syst. 5(1): 29-53 (2006)
8EEPhilippe Coussy, Gwenolé Corre, Pierre Bomel, Eric Senn, Eric Martin: High-level synthesis under I/O Timing and Memory constraints CoRR abs/cs/0605143: (2006)
7EEGwenolé Corre, Philippe Coussy, Pierre Bomel, Eric Senn, Eric Martin: Synthèse Comportementale Sous Contraintes de Communication et de Placement Mémoire pour les composants du TDSI CoRR abs/cs/0605146: (2006)
2005
6EEPierre Bomel, Eric Martin, Emmanuel Boutillon: Synchronization Processor Synthesis for Latency Insensitive Systems. DATE 2005: 896-897
5EENabil Abdelli, Pierre Bomel, Emmanuel Casseau, Anne-Marie Fouilliart, Christophe Jégo, Philippe Kajfasz, Bertrand Le Gal, Nathalie Le Heno: Hardware Virtual Components Compliant with Communication System Standards. DSD 2005: 88-95
4EEPierre Bomel, Nabil Abdelli, Eric Martin, Anne-Marie Fouilliart, Emmanuel Boutillon, Philippe Kajfasz: High-Level Synthesis in Latency Insensitive System Methodology. DSD 2005: 96-101
3EEPhilippe Coussy, Gwenolé Corre, Eric Senn, Pierre Bomel, Eric Martin: High-level synthesis under I/O timing and memory constraints. ISCAS (1) 2005: 680-683
2EEPierre Bomel, Nabil Abdelli, Eric Martin, Anne-Marie Fouilliart, Emmanuel Boutillon, Philippe Kajfasz: DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context. SAMOS 2005: 424-433
2004
1EEGwenolé Corre, Eric Senn, Pierre Bomel, Nathalie Julien, Eric Martin: Memory accesses management during high level synthesis. CODES+ISSS 2004: 42-47

Coauthor Index

1Nabil Abdelli [2] [4] [5]
2Adel Baganne [9] [10]
3Emmanuel Boutillon [2] [4] [6] [11]
4Emmanuel Casseau [5] [9] [10]
5Gwenolé Corre [1] [3] [7] [8]
6Philippe Coussy [3] [7] [8] [9] [10]
7Jeremie Crenne [12] [14]
8Jean-Philippe Diguet [12] [13] [14]
9Anne-Marie Fouilliart [2] [4] [5]
10Bertrand Le Gal [5]
11Guy Gogniat [12] [13] [14]
12Nathalie Le Heno [5]
13Christophe Jégo [5]
14Nathalie Julien [1]
15Philippe Kajfasz [2] [4] [5]
16Eric Martin [1] [2] [3] [4] [6] [7] [8] [9] [10] [11]
17Eric Senn [1] [3] [7] [8]
18Linfeng Ye [14]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)