2008 | ||
---|---|---|
31 | Silvia Muceli, Danilo Pani, Luigi Raffo: Non-Invasive Real-Time Fetal ECG Extraction - A Block-on-Line DSP Implementation based on the JADE Algorithm. BIOSIGNALS (2) 2008: 458-463 | |
30 | Gianmarco Angius, Danilo Pani, Luigi Raffo, Stefano Seruis, Paolo Randaccio: A DVB-T Based System for the Diffusion of Tele-Home Care Practice. HEALTHINF (2) 2008: 31-36 | |
29 | EE | Francesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo: A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs. SAMOS 2008: 96-105 |
2007 | ||
28 | EE | Paolo Meloni, Giovanni Busonera, Salvatore Carta, Luigi Raffo: On the impact of serialization on the cache performances in Network-on-Chip based MPSoCs. DSD 2007: 556-562 |
27 | EE | Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, Luca Benini: NoC Design and Implementation in 65nm Technology. NOCS 2007: 273-282 |
26 | EE | Giovanni Busonera, Stefano Carucci, Danilo Pani, Luigi Raffo: Self-Organization on Silicon: System Integration of a Fixed-Point Swarm Coprocessor. NICSO 2007: 149-158 |
25 | EE | Francesca Palumbo, Danilo Pani, Luigi Raffo, Simone Secchi: A Surface Tension and Coalescence Model for Dynamic Distributed Resources Allocation in Massively Parallel Processors on-Chip. NICSO 2007: 335-345 |
24 | EE | Srinivasan Murali, David Atienza, Paolo Meloni, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo: Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors. IEEE Trans. VLSI Syst. 15(8): 869-880 (2007) |
23 | EE | Federico Angiolini, Paolo Meloni, Salvatore Carta, Luigi Raffo, Luca Benini: A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(3): 421-434 (2007) |
2006 | ||
22 | EE | Gianmarco Angius, Cristian Manca, Danilo Pani, Luigi Raffo: Cooperative VLSI Tiled Architectures: Stigmergy in a Swarm Coprocessor. ANTS Workshop 2006: 396-403 |
21 | EE | Federico Angiolini, Paolo Meloni, Salvatore Carta, Luca Benini, Luigi Raffo: Contrasting a NoC and a traditional interconnect fabric with layout awareness. DATE 2006: 124-129 |
20 | EE | Giovanni Busonera, Salvatore Carta, Andrea Marongiu, Luigi Raffo: Automatic Application Partitioning on FPGA/CPU Systems Based on Detailed Low-Level Information. DSD 2006: 265-268 |
19 | EE | Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo: Designing application-specific networks on chips with floorplan information. ICCAD 2006: 355-362 |
18 | EE | Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo: Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips. VLSI-SoC 2006: 158-163 |
17 | EE | Danilo Pani, Luigi Raffo: Stigmergic approaches applied to flexible fault-tolerant digital VLSI architectures. J. Parallel Distrib. Comput. 66(8): 1014-1024 (2006) |
16 | EE | Salvatore Carta, Danilo Pani, Luigi Raffo: Reconfigurable Coprocessor for Multimedia Application Domain. VLSI Signal Processing 44(1-2): 135-152 (2006) |
2005 | ||
15 | EE | Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli: ast pipes Lite: A Synthesis Oriented Design Library For Networks on Chips. DATE 2005: 1188-1193 |
14 | EE | Danilo Pani, Giuseppe Passino, Luigi Raffo: Run-time Adaptive Resources Allocation and Balancing on Nanoprocessors Arrays. DSD 2005: 492-499 |
13 | Federico Angiolini, Paolo Meloni, Luca Benini, Salvatore Carta, Luigi Raffo: Networks on Chips: A Synthesis Perspective. PARCO 2005: 745-752 | |
2004 | ||
12 | EE | Danilo Pani, Luigi Raffo: A VLSI Multiplication-and-Add Scheme Based on Swarm Intelligence Approaches. ANTS Workshop 2004: 13-24 |
11 | EE | Danilo Pani, Luigi Raffo: A Swarm Intelligence Based VLSI Multiplication-and-Add Scheme. PPSN 2004: 362-371 |
2000 | ||
10 | EE | Silvio Bolliri, Paolo Porcu, Luigi Raffo: A micro-power mixed signal IC for battery-operated burglar alarm systems. ISLPED 2000: 73-77 |
1999 | ||
9 | EE | Andrea Alimonda, Salvatore Carta, Luigi Raffo: A modular digital VLSI architecture for stereo depth estimation in industrial applications. ISCAS (6) 1999: 481-484 |
1998 | ||
8 | EE | Luigi Raffo, Silvio P. Sabatini, Gian Marco Bo, Giacomo M. Bisio: Analog VLSI circuits as physical structures for perception in early visual tasks. IEEE Transactions on Neural Networks 9(6): 1483-1494 (1998) |
7 | EE | Bruno Crespi, Alex Cozzi, Luigi Raffo, Silvio P. Sabatini: Analog computation for phase-based disparity estimation: continuous and discrete models. Mach. Vis. Appl. 11(2): 83-95 (1998) |
1997 | ||
6 | Giacomo M. Bisio, Gian Marco Bo, M. Confalone, Luigi Raffo, Silvio P. Sabatini, M. P. Zizola: An Analog VLSI Computational Engine for Early Vision Tasks. ICANN 1997: 1175-1180 | |
5 | EE | Luigi Raffo, Silvio P. Sabatini, M. Mantelli, A. De Gloria, Giacomo M. Bisio: Design of an ASIP architecture for low-level visual elaborations. IEEE Trans. VLSI Syst. 5(1): 145-153 (1997) |
4 | EE | Silvio P. Sabatini, Luigi Raffo, Giacomo M. Bisio: Functional Periodic Intracortical Couplings Induced by Structured Lateral Inhibition in a Linear Cortical Network. Neural Computation 9(3): 525-531 (1997) |
1996 | ||
3 | EE | Giacomo Indiveri, Luigi Raffo, Silvio P. Sabatini, Giacomo M. Bisio: A recurrent neural architecture mimicking cortical preattentive vision systems. Neurocomputing 11(2-4): 155-170 (1996) |
2 | EE | Maurizio Valle, Luigi Raffo, Daniele D. Caviglia, Giacomo M. Bisio: A VLSI Image Processing Architecture Dedicated to Real-Time Quality Control Analysis in an Industrial Plant. Real-Time Imaging 2(6): 361-371 (1996) |
1990 | ||
1 | EE | Daniele D. Caviglia, Giacomo M. Bisio, Francesco Curatelli, L. Giovannacci, Luigi Raffo: Pre-placement of VLSI blocks through learning neural networks. EURO-DAC 1990: 650-654 |