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S. Ramesh

Sethu Ramesh

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2009
72EER. Venkatraman, R. Castagnetti, Andres Teene, Benjamin Mbouombouo, S. Ramesh: Power & variability test chip architecture and 45nm-generation silicon-based analysis for robust, power-aware SoC design. ISQED 2009: 27-32
71EEKarin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran: Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis. ACM Trans. Design Autom. Electr. Syst. 14(2): (2009)
2008
70EEAnsuman Banerjee, Sayak Ray, Pallab Dasgupta, Partha Pratim Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan: A Dynamic Assertion-Based Verification Platform for Validation of UML Designs. ATVA 2008: 222-227
69EEAmbar A. Gadkari, Anand Yeolekar, J. Suresh, S. Ramesh, Swarup Mohalik, K. C. Shashidhar: AutoMOTGen: Automatic Model Oriented Test Generator for Embedded Control Systems. CAV 2008: 204-208
68EESwarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. Ramesh, P. Vijay Suman, Paritosh K. Pandya, Shengbing Jiang: Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts. DAC 2008: 296-299
67EEKarin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran: A Formal Approach To The Protocol Converter Problem. DATE 2008: 294-299
66EEManoranjan Satpathy, Anand Yeolekar, S. Ramesh: Randomized directed testing (REDIRECT) for Simulink/Stateflow models. EMSOFT 2008: 217-226
65EERajeev Alur, Aditya Kanade, S. Ramesh, K. C. Shashidhar: Symbolic analysis for improving simulation coverage of Simulink/Stateflow models. EMSOFT 2008: 89-98
64EEDeepak D'Souza, Madhu Gopinathan, S. Ramesh, Prahladavaradan Sampath: Conflict-Tolerant Real-Time Features. QEST 2008: 274-283
63EEPrahladavaradan Sampath, A. C. Rajeev, S. Ramesh, K. C. Shashidhar: Behaviour Directed Testing of Auto-code Generators. SEFM 2008: 191-200
62EESamarjit Chakraborty, Sethu Ramesh: Programming and Performance Modelling of Automotive ECU Networks. VLSI Design 2008: 8-9
61EEPurandar Bhaduri, S. Ramesh: Interface synthesis and protocol conversion. Formal Asp. Comput. 20(2): 205-224 (2008)
2007
60EEManoranjan Satpathy, S. Ramesh: Test case generation from formal models through abstraction refinement and model checking. A-MOST 2007: 85-94
59EEAndrei Hagiescu, Unmesh D. Bordoloi, Samarjit Chakraborty, Prahladavaradan Sampath, P. Vignesh V. Ganesan, Sethu Ramesh: Performance Analysis of FlexRay-based ECU Networks. DAC 2007: 284-289
58EEVijay D'Silva, Sampada Sonalkar, S. Ramesh: Existential abstractions for distributed reactive systems via syntactic transformations. EMSOFT 2007: 240-248
57EEPemadeep Ramsokul, Arcot Sowmya, S. Ramesh: A Test Bed for Web Services Protocols. ICIW 2007: 16
56EES. Ramesh, Sneha Kumar Kasera: Best Effort Session-Level Congestion Control. ICNP 2007: 236-245
55EEPrahladavaradan Sampath, A. C. Rajeev, S. Ramesh, K. C. Shashidhar: Testing Model-Processing Tools for Embedded Systems. IEEE Real-Time and Embedded Technology and Applications Symposium 2007: 203-214
54EEAjith K. John, Babita Sharma, A. K. Bhattacharjee, S. D. Dhodapkar, S. Ramesh: Detection of Runtime Errors in MISRA C Programs: A Deductive Approach. SAFECOMP 2007: 491-504
53EEPrahladavaradan Sampath, A. C. Rajeev, K. C. Shashidhar, S. Ramesh: How to Test Program Generators? A Case Study using flex. SEFM 2007: 80-92
52EESethu Ramesh, P. Vignesh V. Ganesan, Gurulingesh Raravit: A Formal Framework for the Correct-by-construction and Verification of Distributed Time Triggered Systems. SIES 2007: 63-70
51EEManoranjan Satpathy, Michael J. Butler, Michael Leuschel, S. Ramesh: Automatic Testing from Formal Specifications. TAP 2007: 95-113
50EEAmbar A. Gadkari, S. Ramesh: Automated Synthesis of Assertion Monitors using Visual Specifications CoRR abs/0710.4698: (2007)
2006
49EEPurandar Bhaduri, S. Ramesh: Synthesis of Synchronous Interfaces. ACSD 2006: 208-216
48EER. Venkatraman, R. Castagnetti, S. Ramesh: The Statistics of Device Variations and its Impact on SRAM Bitcell Performance, Leakage and Stability. ISQED 2006: 190-195
47EEMangala Gowri Nanda, S. Ramesh: Interprocedural slicing of multithreaded programs with applications to Java. ACM Trans. Program. Lang. Syst. 28(6): 1088-1144 (2006)
46EER. Manoharan, P. Thambidurai, S. Ramesh: Power aware scalable multicast routing protocol for MANETs. Int. J. Communication Systems 19(10): 1089-1101 (2006)
2005
45EEAmbar A. Gadkari, S. Ramesh: Automated Synthesis of Assertion Monitors using Visual Specifications. DATE 2005: 390-395
44EER. Castagnetti, R. Venkatraman, B. Bartz, C. Monzel, T. Briscoe, Andres Teene, S. Ramesh: A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC. ISQED 2005: 193-196
43EEAndres Teene, Bob Davis, R. Castagnetti, J. Brown, S. Ramesh: Impact of Interconnect Process Variations on Memory Performance and Design. ISQED 2005: 694-699
2004
42EEAmbar A. Gadkari, S. Ramesh, Rubin A. Parekhji: CESC: a visual formalism for specification and verification of SoCs. ACM Great Lakes Symposium on VLSI 2004: 354-357
41EES. Ramesh, Sampada Sonalkar, Vijay D'Silva, Naveen Chandra, B. Vijayalakshmi: A Toolset for Modelling and Verification of GALS Systems. CAV 2004: 506-509
40EEVijay D'Silva, S. Ramesh, Arcot Sowmya: Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures. DATE 2004: 390-395
39EES. Ramesh, Aditya Rajeev Kulkarni, V. Kamat: Slicing tools for synchronous reactive programs. ISSTA 2004: 217-220
38EEVijay D'Silva, S. Ramesh, Arcot Sowmya: Bridge Over Troubled Wrappers: Automated Interface Synthesis. VLSI Design 2004: 189-194
37EEPurandar Bhaduri, S. Ramesh: Model Checking of Statechart Models: Survey and Research Directions CoRR cs.SE/0407038: (2004)
2003
36EEF. Duan, R. Castagnetti, R. Venkatraman, O. Kobozeva, S. Ramesh: Design and Use of Memory-Specific Test Structures to Ensure SRAM Yield and Manufacturability. ISQED 2003: 119-124
35 Mangala Gowri Nanda, S. Ramesh: Pointer Analysis of Multithreaded Java Programs. SAC 2003: 1068-1075
34EEA. Iqbal, A. K. Bhattacharjee, S. D. Dhodapkar, S. Ramesh: Visual Modeling and Verification of Distributed Reactive Systems. SAFECOMP 2003: 22-34
33EEAditya Rajeev Kulkarni, S. Ramesh: Static Slicing of Reactive Programs. SCAM 2003: 98-107
2002
32EEPartha S. Roop, Arcot Sowmya, S. Ramesh: k-time Forced Simulation: A Formal Verification Technique for IP Reuse. ICCD 2002: 50-55
31EEBabita Sharma, S. D. Dhodapkar, S. Ramesh: Assertion Checking Environment (ACE) for Formal Verification of C Programs. SAFECOMP 2002: 284-295
30EESubir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan: Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract). VLSI Design 2002: 11-13
29EEVinod Ganapathy, S. Ramesh: Slicing Synchronous Reactive Programs. Electr. Notes Theor. Comput. Sci. 65(5): (2002)
2001
28EEPartha S. Roop, Arcot Sowmya, S. Ramesh: A formal approach to component based development of synchronous programs. ASP-DAC 2001: 421-424
27EEPartha S. Roop, Arcot Sowmya, S. Ramesh: Forced simulation: A technique for automating component reuse in embedded systems. ACM Trans. Design Autom. Electr. Syst. 6(4): 602-628 (2001)
26EESridhar Iyer, S. Ramesh: Apportioning: A Technique for Efficient Reachability Analysis of Concurrent Object-Oriented Programs. IEEE Trans. Software Eng. 27(11): 1037-1056 (2001)
2000
25EEPartha S. Roop, Arcot Sowmya, S. Ramesh: Automated Component Adaptation by Forced Simulation. ACAC 2000: 74-81
24EEMangala Gowri Nanda, S. Ramesh: Slicing concurrent programs. ISSTA 2000: 180-190
23EEPartha S. Roop, Arcot Sowmya, S. Ramesh: Automatic Component Matching Using Forced Simulation. VLSI Design 2000: 64-69
22 R. K. Shyamasundar, S. Ramesh: Languages for Reactive Specifications: Synchrony Vs Asynchrony. Int. J. Found. Comput. Sci. 11(2): 283-314 (2000)
1999
21EES. Ramesh, Purandar Bhaduri: Validation of Pipelined Processor Designs Using Esterel Tools: A Case Study. CAV 1999: 84-95
20EES. Ramesh: Efficient Translation of Statecharts to Hardware Circuits. VLSI Design 1999: 384-389
19 S. Ramesh: Implementation of communicating reactive processes. Parallel Computing 25(6): 703-727 (1999)
1998
18EEArcot Sowmya, S. Ramesh: Extending Statecharts with Temporal Logic. IEEE Trans. Software Eng. 24(3): 216-231 (1998)
17 S. Ramesh, Chandrashekar M. Shetty: Impossibility of Synchronization in the Presence of Preemption. Parallel Processing Letters 8(1): 111-120 (1998)
1997
16 S. Ramesh, G. Sivakumar: Foundations of Software Technology and Theoretical Computer Science, 17th Conference, Kharagpur, India, December 18-20, 1997, Proceedings Springer 1997
15EESridhar Iyer, S. Ramesh: A Tool-Suite for Reachability Analysis of Concurrent Object-Oriented Programs. APSEC 1997: 160-
14 Sameer Mahajan, S. Ramesh: Concurrent Logic Programming and pi Calculus. ICLP 1997: 411
13EES. Ramesh, R. Lakshmi, R. Govindarajan: Distributed Shared Memory on IBM SP2. ICPADS 1997: 338-345
1996
12EES. Ramesh, Bommadevara N. Srinivas: A Direct Characterization of Completion. Theor. Comput. Sci. 154(2): 379-385 (1996)
1994
11 R. K. Shyamasundar, S. Ramesh: Languages for Reactive Specifications: Synchrony Vs Asynchrony. FTRTFT 1994: 621-640
10 R. K. Shyamasundar, S. Ramesh: Semantics and Verification of Hierarchical CRP Programs. Hybrid Systems 1994: 436-461
1993
9 G. Berry, S. Ramesh, R. K. Shyamasundar: Communicating Reactive Processes. POPL 1993: 85-98
1992
8 S. Ramesh: Fully Abstract Semantics for Higher Order Communicating Systems. MFCS 1992: 463-471
7 Jozef Hooman, S. Ramesh, Willem P. de Roever: A Compositional Axiomatization of Statecharts. Theor. Comput. Sci. 101(2): 289-335 (1992)
1990
6 S. Ramesh: On the Completeness of Modular Proof Systems. Inf. Process. Lett. 36(4): 195-201 (1990)
1987
5 S. Ramesh: A New Efficient Implementation of CSP with Output Guards. ICDCS 1987: 266-273
4 S. Ramesh: A New and Efficient Implementation of Multiprocess Synchronization. PARLE (2) 1987: 387-401
3 S. Ramesh, S. L. Mehndiratta: A Methodology for Developing Distributed Programs. IEEE Trans. Software Eng. 13(8): 967-976 (1987)
1985
2 S. Ramesh, S. L. Mehndiratta: A New Class of High Level Programs for Distributed Computing Systems. FSTTCS 1985: 42-72
1983
1 S. Ramesh, S. L. Mehndiratta: The Liveness Property of On-the-Fly Garbage Collector - A Proof. Inf. Process. Lett. 17(4): 189-195 (1983)

Coauthor Index

1Rajeev Alur [65]
2Karin Avnit [67] [71]
3Ansuman Banerjee [70]
4B. Bartz [44]
5G. Berry [9]
6Purandar Bhaduri [21] [37] [49] [61]
7A. K. Bhattacharjee [34] [54]
8Unmesh D. Bordoloi [59]
9T. Briscoe [44]
10J. Brown [43]
11Michael J. Butler [51]
12R. Castagnetti [36] [43] [44] [48] [72]
13P. P. Chakrabarti (Partha Pratim Chakrabarti) [70]
14Samarjit Chakraborty [59] [62]
15Supratik Chakraborty [30]
16Naveen Chandra [41]
17Vijay D'Silva [38] [40] [41] [58] [67] [71]
18Deepak D'Souza [64]
19Pallab Dasgupta [70]
20Bob Davis [43]
21S. D. Dhodapkar [31] [34] [54]
22Manoj G. Dixit [68]
23F. Duan [36]
24Ambar A. Gadkari [42] [45] [50] [69]
25Vinod Ganapathy [29]
26P. Vignesh V. Ganesan [52] [59] [70]
27Madhu Gopinathan [64]
28R. Govindarajan [13]
29Andrei Hagiescu [59]
30Jozef Hooman [7]
31A. Iqbal [34]
32Sridhar Iyer [15] [26]
33Shengbing Jiang [68]
34Ajith K. John [54]
35V. Kamat [39]
36Aditya Kanade [65]
37Sneha Kumar Kasera [56]
38O. Kobozeva [36]
39Aditya Rajeev Kulkarni [33] [39]
40R. Lakshmi [13]
41Michael Leuschel [51]
42Sameer Mahajan [14]
43R. Manoharan [46]
44Benjamin Mbouombouo [72]
45S. L. Mehndiratta [1] [2] [3]
46Swarup Mohalik [68] [69]
47C. Monzel [44]
48Tsuneo Nakata [30]
49Mangala Gowri Nanda [24] [35] [47]
50Paritosh K. Pandya [68]
51Sri Parameswaran [67] [71]
52Rubin A. Parekhji [42]
53Sreeranga P. Rajan [30]
54A. C. Rajeev [53] [55] [63] [68]
55Pemadeep Ramsokul [57]
56Gurulingesh Raravit [52]
57Sayak Ray [70]
58Willem P. de Roever [7]
59Partha S. Roop [23] [25] [27] [28] [32]
60Subir K. Roy [30]
61Prahladavaradan Sampath [53] [55] [59] [63] [64]
62Manoranjan Satpathy [51] [60] [66]
63Babita Sharma [31] [54]
64K. C. Shashidhar [53] [55] [63] [65] [69]
65Chandrashekar M. Shetty [17]
66R. K. Shyamasundar [9] [10] [11] [22]
67G. Sivakumar [16]
68Sampada Sonalkar [41] [58]
69Arcot Sowmya [18] [23] [25] [27] [28] [32] [38] [40] [57] [67] [71]
70Bommadevara N. Srinivas [12]
71P. Vijay Suman [68]
72J. Suresh [69]
73Andres Teene [43] [44] [72]
74P. Thambidurai [46]
75R. Venkatraman [36] [44] [48] [72]
76B. Vijayalakshmi [41]
77Anand Yeolekar [66] [69]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)