2007 | ||
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30 | EE | Jeong-Yeol Kim, Ho-Soon Shin, Jong-Bae Lee, Moon-Hyun Yoo, Jeong-Taek Kong: SilcVerify: An Efficient Substrate Coupling Noise Simulation Tool for High-Speed & Nano-Scaled Memory Design. ISQED 2007: 475-480 |
29 | EE | Jeong-Taek Kong: Tipping Point for New Design Technologies: DFM, Low Power and ESL. ISQED 2007: 9-14 |
28 | EE | Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture CoRR abs/0710.4808: (2007) |
27 | EE | Andrew B. Kahng, Ira Chayut, John M. Cohn, Toshihiro Hattori, Jeong-Taek Kong, Pierre G. Paulin, Rich Tobias: Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs. IEEE Design & Test of Computers 24(1): 83-93 (2007) |
2006 | ||
26 | EE | Ikhwan Lee, Hyunsuk Kim, Peng Yang, Sungjoo Yoo, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: PowerViP: Soc power estimation framework at transaction level. ASP-DAC 2006: 551-558 |
25 | EE | Sungpack Hong, Sungjoo Yoo, Sheayun Lee, Sangwoo Lee, Hye Jeong Nam, Bum-Seok Yoo, Jaehyung Hwang, Donghyun Song, Janghwan Kim, Jeongeun Kim, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study. CODES+ISSS 2006: 235-240 |
24 | EE | John M. Cohn, Jeong-Taek Kong, Chris Malachowsky, Rich Tobias, B. Traw: Design challenges for next-generation multimedia, game and entertainment platforms. DAC 2006: 459 |
23 | EE | Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-Taek Kim, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, Taewhan Kim: A systematic IP and bus subsystem modeling for platform-based system design. DATE 2006: 560-564 |
22 | EE | Sungpack Hong, Sungjoo Yoo, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: Runtime distribution-aware dynamic voltage scaling. ICCAD 2006: 587-594 |
21 | EE | Young-Gu Kim, Sang-Hoon Lee, Dae-Han Kim, Jae-Woo Im, Sung-Eun Yu, Dae-Wook Kim, Young-Kwan Park, Jeong-Taek Kong: Sensing Margin Analysis of MLC Flash Memories Using a Novel Unified Statistical Model. ISQED 2006: 185-189 |
2005 | ||
20 | EE | Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture. DATE 2005: 138-139 |
19 | Jeong-Taek Kong: SoC in Nanoera: Challenges and Endless Possibility. DATE 2005: 2 | |
18 | EE | Yong-Chan Ban, Soo-Han Choi, Ki-Hung Lee, Dong-Hyun Kim, Ji-Suk Hong, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong: A Fast Lithography Verification Framework for Litho-Friendly Layout Design. ISQED 2005: 169-174 |
17 | EE | Young-Seok Hong, Heeseok Lee, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong: Analysis for Complex Power Distribution Networks Considering Densely Populated Vias. ISQED 2005: 208-212 |
2004 | ||
16 | EE | Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design. DATE 2004: 352-357 |
15 | EE | Jong-Eun Koo, Kyung-Ho Lee, Young-Hoe Cheon, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong: A Variable Reduction Technique for the Analysis of Ultra Large-Scale Power Distribution Networks. ISQED 2004: 137-142 |
14 | EE | Jeong-Taek Kong: CAD for nanometer silicon design challenges and success. IEEE Trans. VLSI Syst. 12(11): 1132-1147 (2004) |
2003 | ||
13 | EE | Hyo-Sig Won, Kyo-Sun Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, Jeong-Taek Kong: An MTCMOS design methodology and its application to mobile computing. ISLPED 2003: 110-115 |
12 | EE | Jae-Seok Yang, Jeong-Yeol Kim, Joon-Ho Choi, Moon-Hyun Yoo, Jeong-Taek Kong: Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis. ISQED 2003: 344-347 |
11 | EE | Won-Seok Lee, Keun-Ho Lee, Jin-Kyu Park, Tae-Kyung Kim, Young-Kwan Park, Jeong-Taek Kong: Investigation of the capacitance deviation due to metal-fills and the effective interconnect geometry modeling. ISQED 2003: 373-376 |
2002 | ||
10 | EE | Chul-Hong Park, Soo-Han Choi, Sang-Uhk Rhie, Dong-Hyun Kim, Jun-Seong Park, Tae-Hwang Jang, Ji-Soong Park, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong: A Hybrid PPC Method Based on the Empirical Etch Model for the 0.14µm DRAM Generation and Beyond. ISQED 2002: 143-147 |
9 | EE | Jin-Kyu Park, Keun-Ho Lee, Chang-Sub Lee, Gi-Young Yang, Young-Kwan Park, Jeong-Taek Kong: Characterizing the Current Degradation of Abnormally Structured MOS Transistors Using a 3D Poisson Solver. ISQED 2002: 322-325 |
2001 | ||
8 | EE | Tae-Jin Kwon, Sang-Hoon Lee, Tae-Seon Kim, Hoe-Jin Lee, Young-Kwan Park, Taek-Soo Kim, Seok-Jin Kim, Jeong-Taek Kong: Performance Improvement for High Speed Devices Using E-tests and the SPICE Model. ISQED 2001: 443- |
2000 | ||
7 | EE | Ji-Soong Park, Chul-Hong Park, Sang-Uhk Rhie, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong, Hyung-Woo Kim, Sun-Il Yoo: An Efficient Rule-Based OPC Approach Using a DRC Tool for 0.18mum ASIC. ISQED 2000: 81-86 |
6 | EE | Kwan-Do Kim, Young-Kwan Park, Jun-Ha Lee, Jeong-Taek Kong, Hee-Sung Kang, Young-Wug Kim, Seok-Jin Kim: Three Dimensional Analysis of Thermal Degradation Effects in FDSOI MOSFET's. ISQED 2000: 87- |
1999 | ||
5 | EE | HoonSang Jin, Myung-Soo Jang, Jin-Suk Song, Jin-Yong Lee, Taek-Soo Kim, Jeong-Taek Kong: Dynamic power estimation using the probabilistic contribution measure (PCM). ISLPED 1999: 279-281 |
1997 | ||
4 | EE | Sang-Hoon Lee, Chang-hoon Choi, Jeong-Taek Kong, Wong-Seong Lee, Jei-Hwan Yoo: An efficient statistical analysis methodology and its application to high-density DRAMs. ICCAD 1997: 678-683 |
1995 | ||
3 | Jeong-Taek Kong, David Overhauser: Combining RC-Interconnect Effects with Nonlinear MOS Macromodels. ISCAS 1995: 570-573 | |
2 | Jeong-Taek Kong, Syed Zakir Hussain, David Overhauser: Improving Digital MOS Macromodel Accuracy. ISCAS 1995: 578-581 | |
1 | EE | Jeong-Taek Kong, David Overhauser: Methods to improve digital MOS macromodel accuracy. IEEE Trans. on CAD of Integrated Circuits and Systems 14(7): 868-881 (1995) |