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Sounil Biswas

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2008
6EESounil Biswas, R. D. (Shawn) Blanton: Test Compaction for Mixed-Signal Circuits Using Pass-Fail Test Data. VTS 2008: 299-308
2007
5EESounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi: Specification Test Compaction for Analog Circuits and MEMS CoRR abs/0710.4719: (2007)
2006
4EESounil Biswas, Ronald D. Blanton: Statistical Test Compaction Using Binary Decision Trees. IEEE Design & Test of Computers 23(6): 452-462 (2006)
2005
3EESounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi: Specification Test Compaction for Analog Circuits and MEMS. DATE 2005: 164-169
2004
2EESounil Biswas, Kumar N. Dwarakanath, R. D. (Shawn) Blanton: Generalized Sensitization using Fault Tuples. VTS 2004: 297-303
2003
1EESounil Biswas, Baquer Mazhari: A Path Sensitization Technique for Testing of Switched Capacitor Circuits. VLSI Design 2003: 30-35

Coauthor Index

1R. D. (Shawn) Blanton (Ronald D. Blanton) [2] [3] [4] [5] [6]
2Kumar N. Dwarakanath [2]
3Peng Li [3] [5]
4Baquer Mazhari [1]
5Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage) [3] [5]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)