DATE 2008:
Munich,
Germany
Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008.
IEEE 2008, ISBN 978-3-9810801-3-1 BibTeX
- Pieter J. Mosterman, Don Orofino, Janos Sztipanovits, Ahmed Amine Jerraya, Wido Kruijtzer, Víctor Reyes, Christos G. Cassandras, Grant Martin:
Automatically Realising Embedded Systems from High-Level Functional Models.
Electronic Edition (link) BibTeX
- Jürgen Becker, Michael Hübner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer:
Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems.
Electronic Edition (link) BibTeX
- Rainer Leupers, Gerd Ascheid, Wilfried Verachtert, Tom Ashby, Arnout Vandecappelle:
System-Level Design and Application Mapping for Wireless and Multimedia MPSoC Architectures.
Electronic Edition (link) BibTeX
- Diana Marculescu, Sani R. Nassif:
Design Variability: Challenges and Solutions at Microarchitecture-Architecture Level.
Electronic Edition (link) BibTeX
- Jerry Frenkil, Ken Choi, Kimiyoshi Usami:
Power Gating for Ultra-low Leakage: Physics, Design, and Analysis.
Electronic Edition (link) BibTeX
- Eugenio Villar, Axel Jantsch, Christoph Grimm, Tim Kogel:
Heterogeneous System-level Specification Using SystemC.
Electronic Edition (link) BibTeX
- Dimitris Gizopoulos, Kaushik Roy, Patrick Girard, Nicola Nicolici, Xiaoqing Wen:
Power-Aware Testing and Test Strategies for Low Power Devices.
Electronic Edition (link) BibTeX
- David Binkley, Helmut E. Graeb, Georges G. E. Gielen, Jaijeet S. Roychowdhury:
From Transistor to PLL - Analogue Design and EDA Methods.
Electronic Edition (link) BibTeX
- Carsten Elgert, Volker Herbig, Anton Ossner, Thomas Harms, Emmanuel Blanc:
DfM in the Analogue and Digital World.
Electronic Edition (link) BibTeX
- Rolf Ernst, Marek Jersak, Hans Sarnowski, Marco Bekooij, Samarjit Chakraborty:
Formal Methods in System and MpSoC Performance Analysis and Optimisation.
Electronic Edition (link) BibTeX
- Dimitris Gizopoulos, Kaushik Roy, Subhasish Mitra, Pia Sanda:
Soft Errors: System Effects, Protection Techniques and Case Studies.
Electronic Edition (link) BibTeX
- Giovanni De Micheli:
Designing Micro/Nano Systems for a Safer and Healthier Tomorrow.
1
Electronic Edition (link) BibTeX
- Dominique Vernay:
Perspective on Embedded Systems: Challenges, Solutions and Research Priorities.
2
Electronic Edition (link) BibTeX
- Yonghyun Hwang, Samar Abdi, Daniel Gajski:
Cycle-approximate Retargetable Performance Estimation at the Transaction Level.
3-8
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- Jérôme Cornet, Florence Maraninchi, Laurent Maillet-Contoz:
A Method for the Efficient Development of Timed and Untimed Transaction-Level Models of Systems-on-Chip.
9-14
Electronic Edition (link) BibTeX
- Nicola Bombieri, Nicola Deganello, Franco Fummi:
Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation.
15-20
Electronic Edition (link) BibTeX
- Walter Fuß:
Tailored Solutions for Safety-Installations in the Loetschberg Tunnel - A Project with Importance for the Trans-European Rail Traffic.
21-25
Electronic Edition (link) BibTeX
- Jan B. Freuer, Goran Jerke, Joachim Gerlach, Wolfgang Nebel:
On the Verification of High-Order Constraint Compliance in IC Design.
26-31
Electronic Edition (link) BibTeX
- Wido Kruijtzer, Pieter van der Wolf, Erwin A. de Kock, Jan Stuyt, Wolfgang Ecker, Albrecht Mayer, Serge Hustin, Christophe Amerijckx, Serge de Paoli, Emmanuel Vaumorin:
Industrial IP Integration Flows based on IP-XACT Standards.
32-37
Electronic Edition (link) BibTeX
- Timo Vogt, Norbert Wehn:
A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment.
38-43
Electronic Edition (link) BibTeX
- Ben Cope, Peter Y. K. Cheung, Wayne Luk:
Using Reconfigurable Logic to Optimise GPU Memory Accesses.
44-49
Electronic Edition (link) BibTeX
- Katarina Paulsson, Michael Hübner, Jürgen Becker:
Cost-and Power Optimized FPGA based System Integration: Methodologies and Integration of a Low-Power Capacity-based Measurement Application on Xilinx FPGAs.
50-55
Electronic Edition (link) BibTeX
- B. Neumann, Thorsten von Sydow, Holger Blume, Tobias G. Noll:
Design flow for embedded FPGAs based on a flexible architecture template.
56-61
Electronic Edition (link) BibTeX
- A. Tchegho, Heinz Mattes, Sebastian Sattler:
Optimal High-Resolution Spectral Analyzer.
62-67
Electronic Edition (link) BibTeX
- Haralampos-G. D. Stratigopoulos, Jeanne Tongbong, Salvador Mir:
A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation.
68-73
Electronic Edition (link) BibTeX
- Amir Zjajo, José Pineda de Gyvez:
Diagnostic Analysis of Static Errors in Multi-Step Analog to Digital Converters.
74-79
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- Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda:
Practical Implementation of a Network Analyzer for Analog BIST Applications.
80-85
Electronic Edition (link) BibTeX
- Joost-Pieter Katoen:
Quantitative Evaluation in Embedded System Design: Trends in Modeling and Analysis Techniques.
86-87
Electronic Edition (link) BibTeX
- Nicolas Coste, Hubert Garavel, Holger Hermanns, Richard Hersemeule, Yvain Thonnart, Meriem Zidouni:
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures.
88-89
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- Lucia Cloth, Boudewijn R. Haverkort:
Quantitative Evaluation in Embedded System Design: Predicting Battery Lifetime in Mobile Devices.
90-91
Electronic Edition (link) BibTeX
- Ying Tan, Qinru Qiu:
A Framework of Stochastic Power Management Using Hidden Markov Model.
92-97
Electronic Edition (link) BibTeX
- Yu Zhou, Somnath Paul, Swarup Bhunia:
Harvesting Wasted Heat in a Microprocessor Using Thermoelectric Generators: Modeling, Analysis and Measurement.
98-103
Electronic Edition (link) BibTeX
- Davide Brunelli, Luca Benini, Clemens Moser, Lothar Thiele:
An Efficient Solar Energy Harvester for Wireless Sensor Nodes.
104-109
Electronic Edition (link) BibTeX
- Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen Boyd, Luca Benini, Giovanni De Micheli:
Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization.
110-115
Electronic Edition (link) BibTeX
- Amir Hossein Ghamarian, Marc Geilen, Twan Basten, Sander Stuijk:
Parametric Throughput Analysis of Synchronous Data Flow Graphs.
116-121
Electronic Edition (link) BibTeX
- Gunar Schirner, Rainer Dömer:
Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling.
122-127
Electronic Edition (link) BibTeX
- Kim Grüttner, Frank Oppenheimer, Wolfgang Nebel, Fabien Colas-Bigey, Anne-Marie Fouilliart:
SystemC-based Modelling, Seamless Refinement, and Synthesis of a JPEG 2000 Decoder.
128-133
Electronic Edition (link) BibTeX
- Michel Vasilevski, François Pêcheux, Nicolas Beilleau, Hassan Aboushady, Karsten Einwich:
Modeling and Refining Heterogeneous Systems With SystemC-AMS: Application to WSN.
134-139
Electronic Edition (link) BibTeX
- Tobias Massier, Helmut E. Graeb, Ulf Schlichtmann:
Sizing Rules for Bipolar Analog Circuit Design.
140-145
Electronic Edition (link) BibTeX
- Tom J. Kazmierski, Dafeng Zhou, Bashir M. Al-Hashimi:
Efficient circuit-level modelling of ballistic CNT using piecewise non-linear approximation of mobile charge density.
146-151
Electronic Edition (link) BibTeX
- Sawal Ali, Reuben Wilcock, Peter Wilson, Andrew Brown:
A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits.
152-157
Electronic Edition (link) BibTeX
- Michael Glaß, Martin Lukasiewycz, Felix Reimann, Christian Haubelt, Jürgen Teich:
Symbolic Reliability Analysis and Optimization of ECU Networks.
158-163
Electronic Edition (link) BibTeX
- Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Tobias Kirsten, Volker Schonknecht, Stephan Reitemeyer:
Verification of Temporal Properties in Automotive Embedded Software.
164-169
Electronic Edition (link) BibTeX
- Bernd Stube, Bernd Schröder, Eckart Hoene, Andre Lissner:
A Novel Approach for EMI Design of Power Electronics.
170-175
Electronic Edition (link) BibTeX
- Nicolas Alt, Christopher Claus, Walter Stechele:
Hardware/software architecture of an algorithm for vision-based real-time vehicle detection in dark environments.
176-181
Electronic Edition (link) BibTeX
- Ozgur Sinanoglu, Erik Jan Marinissen:
Analysis of The Test Data Volume Reduction Benefit of Modular SOC Testing.
182-187
Electronic Edition (link) BibTeX
- Anders Larsson, Erik Larsson, Krishnendu Chakrabarty, Petru Eles, Zebo Peng:
Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns.
188-193
Electronic Edition (link) BibTeX
- Paolo Bernardi, Matteo Sonza Reorda:
An novel Methodology for Reducing SoC Test Data Volume on FPGA-based Testers.
194-199
Electronic Edition (link) BibTeX
- Jelte Peter Vink, Kees van Berkel, Pieter van der Wolf:
Performance Analysis of SoC Architectures Based on Latency-Rate Servers.
200-205
Electronic Edition (link) BibTeX
- Sujan Pandey, Rolf Drechsler:
Slack Allocation Based Co-Synthesis and Optimization of Bus and Memory Architectures for MPSoCs.
206-211
Electronic Edition (link) BibTeX
- Philip K. F. Hölzenspies, Johann Hurink, Jan Kuper, Gerard J. M. Smit:
Run-time Spatial Mapping of Streaming Applications to a Heterogeneous Multi-Processor System-on-Chip (MPSOC).
212-217
Electronic Edition (link) BibTeX
- Sungchan Kim, Chanik Park, Soonhoi Ha:
Architecture Exploration of NAND Flash-based Multimedia Card.
218-223
Electronic Edition (link) BibTeX
- Hwisung Jung, Massoud Pedram:
Resilient Dynamic Power Management under Uncertainty.
224-229
Electronic Edition (link) BibTeX
- Clemens Moser, Lothar Thiele, Davide Brunelli, Luca Benini:
Robust and Low Complexity Rate Control for Solar Powered Sensors.
230-235
Electronic Edition (link) BibTeX
- Shaobo Liu, Qinru Qiu, Qing Wu:
Energy Aware Dynamic Voltage and Frequency Selection for Real-Time Systems with Energy Harvesting.
236-241
Electronic Edition (link) BibTeX
- Sungpack Hong, Sungjoo Yoo, Byeong Bin, Kyu-Myung Choi, Soo-Kwan Eo, Taehwan Kim:
Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution.
242-247
Electronic Edition (link) BibTeX
- Thidapat Chantem, Robert P. Dick, Xiaobo Sharon Hu:
Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs.
288-293
Electronic Edition (link) BibTeX
- Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran:
A Formal Approach To The Protocol Converter Problem.
294-299
Electronic Edition (link) BibTeX
- Arno Moonen, Marco Bekooij, Rene van den Berg, Jef L. van Meerbergen:
Cache Aware Mapping of Streaming Applications on a Multiprocessor System-on-Chip.
300-305
Electronic Edition (link) BibTeX
- Greg Hoover, Forrest Brewer:
Synthesizing Synchronous Elastic Flow Networks.
306-311
Electronic Edition (link) BibTeX
- Igor Vytyaz, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
Periodic Steady-State Analysis Augmented with Design Equality Constraints.
312-317
Electronic Edition (link) BibTeX
- Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, Brian J. Mulvaney, Kiran K. Gullapalli:
Analysis of Oscillator Injection Locking by Harmonic Balance Method.
318-323
Electronic Edition (link) BibTeX
- Sebastian Steinhorst, Lars Hedrich:
Model Checking of Analog Systems using an Analog Specification Language.
324-329
Electronic Edition (link) BibTeX
- Grégory Gailliard, Hugues Balp, Michel Sarlotte, François Verdier:
Mapping Semantics of CORBA IDL and GIOP to Open Core Protocol for Portability and Interoperability of SDR Waveform Components.
330-335
Electronic Edition (link) BibTeX
- Luca Sterpone, M. A. Aguirre, Jonathan Noel Tombs, H. Guzman-Miranda:
On the design of tunable fault tolerant circuits on SRAM-based FPGAs for safety critical applications.
336-341
Electronic Edition (link) BibTeX
- Massimiliano Melani, Lorenzo Bertini, Marco De Marinis, Peter Lange, Francesco D'Ascoli, Luca Fanucci:
Hot Wire Anemometric MEMS Sensor for Water Flow Monitoring.
342-347
Electronic Edition (link) BibTeX
- Drew C. Ness, David J. Lilja:
Guiding Circuit Level Fault-Tolerance Design with Statistical Methods.
348-353
Electronic Edition (link) BibTeX
- Charu Nagpal, Rajesh Garg, Sunil P. Khatri:
A Delay-efficient Radiation-hard Digital Design Approach Using CWSP Elements.
354-359
Electronic Edition (link) BibTeX
- Wenjing Rao, Alex Orailoglu:
Towards fault tolerant parallel prefix adders in nanoelectronic systems.
360-365
Electronic Edition (link) BibTeX
- Swaroop Ghosh, Patrick Ndai, Kaushik Roy:
A Novel Low Overhead Fault Tolerant Kogge-Stone Adder Using Adaptive Clocking.
366-371
Electronic Edition (link) BibTeX
- Jan Beutel, M. Beigl, Adam Dunkels, Koen Langendoen:
Embedded Tutorial - Software for Wireless Networked Embedded Systems.
372
Electronic Edition (link) BibTeX
- Lawrence Leinweber, Swarup Bhunia:
Fine-Grained Supply Gating Through Hypergraph Partitioning and Shannon Decomposition for Active Power Reduction.
373-378
Electronic Edition (link) BibTeX
- Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino:
A Scalable Algorithmic Framework for Row-Based Power-Gating.
379-384
Electronic Edition (link) BibTeX
- Ehsan Pakbaznia, Massoud Pedram:
Coarse-Grain MTCMOS Sleep Transistor Sizing Using Delay Budgeting.
385-390
Electronic Edition (link) BibTeX
- T. Forest, Alberto Ferrari, G. Audisio, M. Sabatini, Alberto L. Sangiovanni-Vincentelli, Marco Di Natale:
Physical Architectures of Automotive Systems.
391-395
Electronic Edition (link) BibTeX
- Nicola Bombieri, Franco Fummi, Graziano Pravadelli:
A Mutation Model for the SystemC TLM 2.0 Communication Interfaces.
396-401
Electronic Edition (link) BibTeX
- Weixin Wu, Michael S. Hsiao:
Efficient Design Validation Based on Cultural Algorithms.
402-407
Electronic Edition (link) BibTeX
- João Marques-Silva, Jordi Planes:
Algorithms for Maximum Satisfiability using Unsatisfiable Cores.
408-413
Electronic Edition (link) BibTeX
- Shan Tang, Qiang Xu:
In-band Cross-Trigger Event Transmission for Transaction-Based Debug.
414-419
Electronic Edition (link) BibTeX
- João M. S. Silva, Joel R. Phillips, Luis Miguel Silveira:
Efficient Representation and Analysis of Power Grids.
420-425
Electronic Edition (link) BibTeX
- Navin Srivastava, Roberto Suaya, Kaustav Banerjee:
High-Frequency Mutual Impedance Extraction of VLSI Interconnects In the Presence of a Multi-layer Conducting Substrate.
426-431
Electronic Edition (link) BibTeX
- Duo Li, Sheldon X.-D. Tan, Bruce McGaughy:
ETBR: Extended Truncated Balanced Realization Method for On-Chip Power Grid Network Analysis.
432-437
Electronic Edition (link) BibTeX
- Basel Halak, Alexandre Yakovlev:
Bandwidth-Centric Optimisation for Area-Constrained Links with Crosstalk Avoidance Methods.
438-443
Electronic Edition (link) BibTeX
- Min Li, Bruno Bougard, Weiyu Xu, David Novo, Liesbet Van der Perre, Francky Catthoor:
Optimizing Near-ML MIMO Detector for SDR Baseband on Parallel Programmable Architectures.
444-449
Electronic Edition (link) BibTeX
- Akash Kumar, Kees van Berkel:
Vectorization of Reed Solomon Decoding and Mapping on the EVP.
450-455
Electronic Edition (link) BibTeX
- Matthias May, Matthias Alles, Norbert Wehn:
A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder.
456-461
Electronic Edition (link) BibTeX
- Anshuman Chandra, Felix Ng, Rohit Kapur:
Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction.
462-467
Electronic Edition (link) BibTeX
- Melanie Elm, Hans-Joachim Wunderlich:
Scan Chain Organization for Embedded Diagnosis.
468-473
Electronic Edition (link) BibTeX
- V. Tenentes, Xrysovalantis Kavousianos, Emmanouil Kalligeros:
State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores.
474-479
Electronic Edition (link) BibTeX
- Jason G. Brown, Brian Taylor, Ronald D. Blanton, Larry T. Pileggi:
Automated Testability Enhancements for Logic Brick Libraries.
480-485
Electronic Edition (link) BibTeX
- Alexandre David, Kim Guldstrand Larsen, Shuhao Li, Brian Nielsen:
A Game-Theoretic Approach to Real-Time System Testing.
486-491
Electronic Edition (link) BibTeX
- Jonas Rox, Rolf Ernst:
Modeling Event Stream Hierarchies with Hierarchical Event Models.
492-497
Electronic Edition (link) BibTeX
- Luiza Gheorghe, Faouzi Bouchhima, Gabriela Nicolescu, Hanifa Boucheneb:
Semantics for Model-Based Validation of Continuous/Discrete Systems.
498-503
Electronic Edition (link) BibTeX
- Lisane B. de Brisolara, Marcio F. da S. Oliveira, Ricardo Miotto Redin, Luís C. Lamb, Luigi Carro, Flávio Rech Wagner:
Using UML as Front-end for Heterogeneous Software Code Generation Strategies.
504-509
Electronic Edition (link) BibTeX
- S. Turnoy, Peter Wintermayr, Robert C. Aitken, Rudy Lauwereins, J. Tracy Weed, V. Kiefer, J. Hartmann:
Panel Session - Caution Ahead: The Road to Design and Manufacturing at 32 and 22 nm.
510
Electronic Edition (link) BibTeX
- Harald Heinecke, Werner Damm, Bernhard Josko, Alexander Metzner, Hermann Kopetz, Alberto L. Sangiovanni-Vincentelli, Marco Di Natale:
Software Components for Reliable Automotive Systems.
549-554
Electronic Edition (link) BibTeX
- Herbert Hanselmann:
Model-Based-Design Is Nice But...
555
Electronic Edition (link) BibTeX
- Soheil Samii, Sergiu Rafiliu, Petru Eles, Zebo Peng:
A Simulation Methodology for Worst-Case Response Time Estimation of Distributed Real-Time Systems.
556-561
Electronic Edition (link) BibTeX
- Bao Liu:
Signal Probability Based Statistical Timing Analysis.
562-567
Electronic Edition (link) BibTeX
- Behnam Amelifard, Safar Hatami, Hanif Fatemi, Massoud Pedram:
A Current Source Model for CMOS Logic Cells Considering Multiple Input Switching and Stack Effect.
568-573
Electronic Edition (link) BibTeX
- Amit Goel, Sarma B. K. Vrudhula:
Current source based standard cell model for accurate signal integrity and timing analysis.
574-579
Electronic Edition (link) BibTeX
- Wangyang Zhang, Wenjian Yu, Zeyi Wang, Zhiping Yu, Rong Jiang, Jinjun Xiong:
An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation.
580-585
Electronic Edition (link) BibTeX
- Jorge Fernandez Villena, Luis Miguel Silveira:
SPARE - a Scalable algorithm for passive, structure preserving, Parameter-Aware model order REduction.
586-591
Electronic Edition (link) BibTeX
- Brian Cline, Kaviraj Chopra, David Blaauw, Andres Torres, Savithri Sundareswaran:
Transistor-Specific Delay Modeling for SSTA.
592-597
Electronic Edition (link) BibTeX
- Min Li, David Novo, Bruno Bougard, Liesbet Van der Perre, Francky Catthoor:
Generic Multi-Phase Software-Pipelined Partial-FFT on Instruction-Level-Parallel Architectures and SDR Baseband Applications.
598-603
Electronic Edition (link) BibTeX
- Ralf König, Timo Stripf, Jürgen Becker:
A Novel Recursive Algorithm for Bit-Efficient Realization of Arbitrary Length Inverse Modified Cosine Transforms.
604-609
Electronic Edition (link) BibTeX
- Philippe Bonnot, Fabrice Lemonnier, Gilbert Edelin, Gerard Gaillat, Olivier Ruch, Pascal Gauget:
Definition and SIMD Implementation of a Multi-Processing Architecture Approach on FPGA.
610-615
Electronic Edition (link) BibTeX
- Aswin Sreedhar, Alodeep Sanyal, Sandip Kundu:
On Modeling and Testing of Lithography Related Open Faults in Nano-CMOS Circuits.
616-621
Electronic Edition (link) BibTeX
- Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah, Peter A. Habitz:
Optimal Margin Computation for At-Speed Test.
622-627
Electronic Edition (link) BibTeX
- Piet Engelke, Ilia Polian, Jürgen Schlöffel, Bernd Becker:
Resistive Bridging Fault Simulation of Industrial Circuits.
628-633
Electronic Edition (link) BibTeX
- Yen-Tzu Lin, Osei Poku, Naresh K. Bhatti, Ronald D. Blanton:
Physically-Aware N-Detect Test Pattern Selection.
634-639
Electronic Edition (link) BibTeX
- Maarten Wiggers, Marco Bekooij, Gerard J. M. Smit:
Computation of Buffer Capacities for Throughput Constrained and Data Dependent Inter-Task Communication.
640-645
Electronic Edition (link) BibTeX
- Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcott, Nikil Dutt, Nalini Venkatasubramanian:
Constraint Refinement for Online Verifiable Cross-Layer System Adaptation.
646-651
Electronic Edition (link) BibTeX
- Parth Malani, Prakash Mukre, Qinru Qiu, Qing Wu:
Adaptive Scheduling and Voltage Scaling for Multiprocessor Real-time Applications with Non-deterministic Workload.
652-657
Electronic Edition (link) BibTeX
- E. Schutz, K. Glinos, D. Beenaert, L. Gide:
Embedded Tutorial - ARTEMIS and ENIAC Joint Undertakings: A New Approach to Conduct Research in Europe.
658
Electronic Edition (link) BibTeX
- E. Frank, Reinhard Wilhelm, Rolf Ernst, Alberto L. Sangiovanni-Vincentelli, Marco Di Natale:
Methods, Tools and Standards for the Analysis, Evaluation and Design of Modern Automotive Architectures.
659-663
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- Stephen Plaza, Igor L. Markov, Valeria Bertacco:
Random Stimulus Generation using Entropy and XOR Constraints.
664-669
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- Ilya Wagner, Valeria Bertacco:
MCjammer: Adaptive Verification for Multi-core Designs.
670-675
Electronic Edition (link) BibTeX
- Patrice Gerin, Xavier Guerin, Frédéric Petrot:
Efficient Implementation of Native Software Simulation for MPSoC.
676-681
Electronic Edition (link) BibTeX
- Xueqi Cheng, Michael S. Hsiao:
Simulation-Directed Invariant Mining for Software Verification.
682-687
Electronic Edition (link) BibTeX
- Massoud Momeni, Petru Bogdan Bacinschi, Manfred Glesner:
Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation.
688-693
Electronic Edition (link) BibTeX
- Shun Li, Hua Chen, Feng Zhou:
A Novel Technique for Improving Temperature Independency of Ring-ADC.
694-697
Electronic Edition (link) BibTeX
- Petru Bogdan Bacinschi, Tudor Murgan, Klaus Koch, Manfred Glesner:
An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches in Transistor Pairs.
698-703
Electronic Edition (link) BibTeX
- Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashimi, Stephen P. Beeby, Russel N. Torah:
Integrated approach to energy harvester mixed technology modelling and performance optimisation.
704-709
Electronic Edition (link) BibTeX
- Wolfgang Eberle, Michaël Goffioul:
A scalable low-power digital communication network architecture and an automated design path for controlling the analog/RF part of SDR transceivers.
710-715
Electronic Edition (link) BibTeX
- Bruno Bougard, Bjorn De Sutter, Sebastien Rabou, David Novo, Osman Allam, Steven Dupont, Liesbet Van der Perre:
A Coarse-Grained Array based Baseband Processor for 100Mbps+ Software Defined Radio.
716-721
Electronic Edition (link) BibTeX
- David Novo, Bruno Bougard, Andy Lambrechts, Liesbet Van der Perre, Francky Catthoor:
Scenario-Based Fixed-point Data Format Refinement to Enable Energy-scalable Software Defined Radios.
722-727
Electronic Edition (link) BibTeX
- C. P. Ravikumar, M. Hirech, X. Wen:
Test Strategies for Low Power Devices.
728-733
Electronic Edition (link) BibTeX
- Fabrizio Mulas, Michele Pittau, Marco Buttu, Salvatore Carta, Andrea Acquaviva, Luca Benini, David Atienza, Giovanni De Micheli:
Thermal Balancing Policy for Streaming Computing on Multiprocessor Architectures.
734-739
Electronic Edition (link) BibTeX
- Olivier Certner, Zheng Li, Pierre Palatin, Olivier Temam, Frederic Arzel, Nathalie Drach:
A Practical Approach for Reconciling High and Predictable Performance in Non-Regular Parallel Programs.
740-745
Electronic Edition (link) BibTeX
- Matin Hashemi, Soheil Ghiasi:
Exact and Approximate Task Assignment Algorithms for Pipelined Software Synthesis.
746-751
Electronic Edition (link) BibTeX
- Lars Bauer, Muhammad Shafique, Stephanie Kreutz, Jörg Henkel:
Run-time System for an Extensible Embedded Processor with Dynamic Instruction Set.
752-757
Electronic Edition (link) BibTeX
- Hai Lin, Yunsi Fei:
Harnessing Horizontal Parallelism and Vertical Instruction Packing of Programs to Improve System Overall Efficiency.
758-763
Electronic Edition (link) BibTeX
- I-Wei Wu, Zhi-Yuan Chen, Jean Jyh-Jiun Shann, Chung-Ping Chung:
Instruction Set Extension Exploration in Multiple-Issue Architecture.
764-769
Electronic Edition (link) BibTeX
- Talal Bonny, Jörg Henkel:
Instruction Re-encoding Facilitating Dense Embedded Code.
770-775
Electronic Edition (link) BibTeX
- Alberto L. Sangiovanni-Vincentelli, Marco Di Natale, Scuola S. Anna, H. Hanselmann, Harald Heinecke, Amar Bouali, Hermann Kopetz, H. Fennel, Thomas Weber:
Panel Session - The Future Car: Technology, Methods and Tools.
812
Electronic Edition (link) BibTeX
- Chao-Yue Lai, Chung-Yang Huang, Kei-Yong Khoo:
Improving Constant-Coefficient Multiplier Verification by Partial Product Identification.
813-818
Electronic Edition (link) BibTeX
- Kuntal Nanshi, Fabio Somenzi:
Improved Visibility in One-to-Many Trace Concretization.
819-824
Electronic Edition (link) BibTeX
- Tamarah Arons, Elad Elster, Shlomit Ozer, Jonathan Shalev, Eli Singerman:
Efficient Symbolic Simulation of Low Level Software.
825-830
Electronic Edition (link) BibTeX
- Malay K. Ganai, Aarti Gupta:
Completeness in SMT-based BMC for Software Programs.
831-836
Electronic Edition (link) BibTeX
- Tilo Meister, Jens Lienig, Gisbert Thomke:
Novel Pin Assignment Algorithms for Components with Very High Pin Counts.
837-842
Electronic Edition (link) BibTeX
- Stéphane Badel, Erdem Guleyupoglu, Ozgur Inac, Anna Pena Martinez, Paolo Vietti, Frank K. Gürkaynak, Yusuf Leblebici:
A Generic Standard Cell Design Methodology for Differential Circuit Styles.
843-848
Electronic Edition (link) BibTeX
- Ashutosh Chakraborty, Sean X. Shi, David Z. Pan:
Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices.
849-855
Electronic Edition (link) BibTeX
- Amith Singhee, Sonia Singhal, Rob A. Rutenbar:
Exploiting Correlation Kernels for Efficient Handling of Intra-Die Spatial Correlation, with Application to Statistical Timing.
856-861
Electronic Edition (link) BibTeX
- Alonso Morgado, Rocio del Río, José Manuel de la Rosa:
A Triple-Mode Reconfigurable Sigma-Delta Modulator for Multi-Standard Wireless Applications.
862-867
Electronic Edition (link) BibTeX
- Markus Bingesser, Teddy Loeliger, Werner Hinn, Johann Hauer, Stefan Modl, Robert Dorn, Matthias Volker:
Low-Noise Sigma-Delta Capacitance-to-Digital Converter for Sub-pF Capacitive Sensors with Integrated Dielectric Loss Measurement.
868-872
Electronic Edition (link) BibTeX
- Mustafa Badaroglu, Guy Decabooter, Francois Laulanet, Olivier Charlier:
Calibration of Integrated CMOS Hall Sensors Using Coil-on-Chip in ATE Environment.
873-878
Electronic Edition (link) BibTeX
- Francesco D'Ascoli, L. Bacciarelli, Massimiliano Melani, Luca Fanucci, G. Ricotti, E. Pardi, F. Vincis, Massimiliano Forliti, Marco De Marinis:
A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD Technology.
879-884
Electronic Edition (link) BibTeX
- Yanjing Li, Samy Makar, Subhasish Mitra:
CASP: Concurrent Autonomous Chip Self-Test Using Stored Test Patterns.
885-890
Electronic Edition (link) BibTeX
- Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li:
Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology.
891-896
Electronic Edition (link) BibTeX
- Ramtilak Vemu, Abhijit Jas, Jacob A. Abraham, Srinivas Patil, Rajesh Galivanche:
A low-cost concurrent error detection technique for processor control logic.
897-902
Electronic Edition (link) BibTeX
- Mihir R. Choudhury, Kartik Mohanram:
Approximate logic circuits for low overhead, non-intrusive concurrent error detection.
903-908
Electronic Edition (link) BibTeX
- Krishnendu Chatterjee, Arkadeb Ghosal, Thomas A. Henzinger, Daniel T. Iercan, Christoph M. Kirsch, Claudio Pinello, Alberto L. Sangiovanni-Vincentelli:
Logical Reliability of Interacting Real-Time Tasks.
909-914
Electronic Edition (link) BibTeX
- Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng:
Scheduling of Fault-Tolerant Embedded Systems with Soft and Hard Timing Constraints.
915-920
Electronic Edition (link) BibTeX
- Jonas Elmqvist, Simin Nadjm-Tehrani:
Tool Support for Incremental Failure Mode and Effects Analysis of Component-Based Systems.
921-927
Electronic Edition (link) BibTeX
- Jean-Pierre Talpin, Julien Ouy, Loïc Besnard, Paul Le Guernic:
Compositional design of isochronous systems.
928-933
Electronic Edition (link) BibTeX
- Frank Badstubner, Andreas Vörg:
Quantitative Productivity Measurement in IC Design.
934-935
Electronic Edition (link) BibTeX
- Peter Leppelt, Erich Barke:
Determining the Technical Complexity of Integrated Circuits.
935
Electronic Edition (link) BibTeX
- Stefan Häusler, Frank Poppen, Kevin Hausmann, Axel Hahn, Wolfgang Nebel:
Qalitative and Quantitative Analysis of IC Designs.
935-936
Electronic Edition (link) BibTeX
- Jonathan Young:
Capturing and Analyzing IC Design Productivity Metrics.
936-937
Electronic Edition (link) BibTeX
- Katharina Weinberger, Slava Bulach, Robert Bosch:
Application of Workflow Petri Nets to Modeling of Formal Verification Processes in Design Flow of Digital Integrated Circuits.
937-938
Electronic Edition (link) BibTeX
- Hans-Jürgen Brand:
Optimization of Design Flows for Multi-Core x86 Microprocessors in 45 and 32nm Technologies under Productivity Considerations.
938-939
Electronic Edition (link) BibTeX
- Jacob A. Abraham:
Implications of Technology Trends on System Dependability.
940
Electronic Edition (link) BibTeX
- Subhasish Mitra:
Globally Optimized Robust Systems to Overcome Scaled CMOS Reliability Challenges.
941-946
Electronic Edition (link) BibTeX
- Ute Wappler, Martin Muller:
Software Protection Mechanisms for Dependable Systems.
947-952
Electronic Edition (link) BibTeX
- Marino Strik, Alain Gonier, Paul Williams:
Subsystem Exchange in a Concurrent Design Process Environment.
953-958
Electronic Edition (link) BibTeX
- Raffaele Penazzi, Piergiorgio Capozio, Martin Duncan, Angelo Scuderi, Max Siti, Edoardo Merli:
Cooperative Safety: a Combination of Multiple Technologies.
959-961
Electronic Edition (link) BibTeX
- Albrecht Mayer, Frank Hellwig:
System Performance Optimization Methodology for Infineon's 32-Bit Automotive Microcontroller Architecture.
962-966
Electronic Edition (link) BibTeX
- Bonesi Stefano, Davide Bertozzi, Luca Benini, Enrico Macii:
Process Variation Tolerant Pipeline Design Through a Placement-Aware Multiple Voltage Island Design Style.
967-972
Electronic Edition (link) BibTeX
- Andrea Calimera, Luca Benini, Enrico Macii:
Optimal MTCMOS Reactivation Under Power Supply Noise and Performance Constraints.
973-978
Electronic Edition (link) BibTeX
- Rajesh Garg, Gagandeep Mallarapu, Sunil P. Khatri:
A Single-supply True Voltage Level Shifter.
979-984
Electronic Edition (link) BibTeX
- Victor H. Cordero, Sunil P. Khatri:
Clock Distribution Scheme using Coplanar Transmission Lines.
985-990
Electronic Edition (link) BibTeX
- Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana:
Compositional, dynamic cache management for embedded chip multiprocessors.
991-996
Electronic Edition (link) BibTeX
- Pierre Guironnet de Massas, Frédéric Pétrot:
Comparison of memory write policies for NoC based Multicore Cache Coherent Systems.
997-1002
Electronic Edition (link) BibTeX
- Simon Ogg, Enrico Valli, Bashir M. Al-Hashimi, Alexandre Yakovlev, Crescenzo D'Alessandro, Luca Benini:
Serialized Asynchronous Links for NoC.
1003-1008
Electronic Edition (link) BibTeX
- Jie Zhang, Nishant Patil, Subhasish Mitra:
Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits.
1009-1014
Electronic Edition (link) BibTeX
- Robert Wille, Hoang M. Le, Gerhard W. Dueck, Daniel Große:
Quantified Synthesis of Reversible Logic.
1015-1020
Electronic Edition (link) BibTeX
- Nicholas Allec, Robert G. Knobel, Li Shang:
Adaptive Simulation for Single-Electron Devices.
1021-1026
Electronic Edition (link) BibTeX
- Francisco J. Rincon, Michele Paselli, Joaquin Recas, Qin Zhao, Marcos Sanchez-Elez, David Atienza, Julien Penders, Giovanni De Micheli:
OS-Based Sensor Node Platform and Energy Estimation Model for Health-Care Wireless Sensor Networks.
1027-1032
Electronic Edition (link) BibTeX
- Alejandro Masrur, Sebastian Drossler, Georg Farber:
Improvements in Polynomial-Time Feasibility Testing for EDF.
1033-1038
Electronic Edition (link) BibTeX
- Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications.
1039-1044
Electronic Edition (link) BibTeX
- Claas Diederichs, Ulrich Margull, Frank Slomka, Gerhard Wirrer:
An application-based EDF scheduler for OSEK/VDX.
1045-1050
Electronic Edition (link) BibTeX
- Gianluca Franchino, Giorgio C. Buttazzo, Tullio Facchinetti:
Time Properties of the BuST Protocol under the NPA Budget Allocation Scheme.
1051-1056
Electronic Edition (link) BibTeX
- Jason Cong, Junjuan Xu:
Simultaneous FU and Register Binding Based on Network Flow Method.
1057-1062
Electronic Edition (link) BibTeX
- Feng Wang, Guangyu Sun, Yuan Xie:
A Variation Aware High Level Synthesis Framework.
1063-1068
Electronic Edition (link) BibTeX
- Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov:
EPIC: Ending Piracy of Integrated Circuits.
1069-1074
Electronic Edition (link) BibTeX
- Adeel Israr, Sorin A. Huss:
Specification and Design Considerations for Reliable Embedded Systems.
1111-1116
Electronic Edition (link) BibTeX
- Petru Eles, Viacheslav Izosimov, Paul Pop, Zebo Peng:
Synthesis of Fault-Tolerant Embedded Systems.
1117-1122
Electronic Edition (link) BibTeX
- Hermann Kopetz:
Reliable Services in an Imperfect World.
1123
Electronic Edition (link) BibTeX
- Pieter van der Wolf, Tomas Henriksson:
Video Processing Requirements on SoC Infrastructures.
1124-1125
Electronic Edition (link) BibTeX
- Dinesh Pamunuwa:
Memory Technology for Extended Large-Scale Integration in Future Electronics Applications.
1126-1127
Electronic Edition (link) BibTeX
- Nikil Dutt:
Memory-aware NoC Exploration and Design.
1128-1129
Electronic Edition (link) BibTeX
- Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah:
Incremental Criticality and Yield Gradients.
1130-1135
Electronic Edition (link) BibTeX
- Sean X. Shi, Anand Ramalingam, Daifeng Wang, David Z. Pan:
Latch Modeling for Statistical Timing Analysis.
1136-1141
Electronic Edition (link) BibTeX
- Andrey Mokhov, Alexandre Yakovlev:
Conditional Partial Order Graphs and Dynamically Reconfigurable Control Synthesis.
1142-1147
Electronic Edition (link) BibTeX
- Janar Thoguluva, Anand Raghunathan, Srimat T. Chakradhar:
Efficient Software Architecture for IPSec Acceleration Using a Programmable Security Processor.
1148-1153
Electronic Edition (link) BibTeX
- Xi Chen, Robert P. Dick, Alok N. Choudhary:
Operating System Controlled Processor-Memory Bus Encryption.
1154-1159
Electronic Edition (link) BibTeX
- Abhishek Das, Sanchit Misra, Sumeet Joshi, Joseph Zambreno, Gokhan Memik, Alok N. Choudhary:
An Efficient FPGA Implementation of Principle Component Analysis based Network Intrusion Detection System.
1160-1165
Electronic Edition (link) BibTeX
- Irith Pomeranz, Sudhakar M. Reddy:
A Bridging Fault Model Where Undetectable Faults Imply Logic Redundancy.
1166-1171
Electronic Edition (link) BibTeX
- Jeremy Lee, Sumit Narayan, Mike Kapralos, Mohammad Tehranipoor:
Layout-Aware, IR-Drop Tolerant Transition Fault Pattern Generation.
1172-1177
Electronic Edition (link) BibTeX
- Shideh Shahidi, Sandeep Gupta:
Multi-Vector Tests: A Path to Perfect Error-Rate Testing.
1178-1183
Electronic Edition (link) BibTeX
- Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing.
1184-1189
Electronic Edition (link) BibTeX
- Sanghyun Park, Aviral Shrivastava, Yunheung Paek:
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors.
1190-1195
Electronic Edition (link) BibTeX
- Timothy M. Jones, Sandro Bartolini, Bruno De Bus, John Cavazos, Michael F. P. O'Boyle:
Instruction Cache Energy Saving Through Compiler Way-Placement.
1196-1201
Electronic Edition (link) BibTeX
- Chun Jason Xue, Edwin Hsing-Mean Sha, Zili Shao, Meikang Qiu:
Effective Loop Partitioning and Scheduling under Memory and Register Dual Constraints.
1202-1207
Electronic Edition (link) BibTeX
- Antonio Carlos Schneider Beck, Mateus B. Rutzig, Georgi Gaydadjiev, Luigi Carro:
Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications.
1208-1213
Electronic Edition (link) BibTeX
- Christophe Wolinski, Krzysztof Kuchcinski:
Automatic Selection of Application-Specific Reconfigurable Processor Extensions.
1214-1219
Electronic Edition (link) BibTeX
- Sankalita Saha, Jason Schlessman, Sebastian Puthenpurayil, Shuvra S. Bhattacharyya, Wayne Wolf:
An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications.
1220-1225
Electronic Edition (link) BibTeX
- Ed Brinksma, Jozef Hooman:
Dependability for high-tech systems: an industry-as-laboratory approach.
1226-1231
Electronic Edition (link) BibTeX
- Chen-Ling Chou, Radu Marculescu:
User-Aware Dynamic Task Allocation in Networks-on-Chip.
1232-1237
Electronic Edition (link) BibTeX
- Mohammad Abdullah Al Faruque, Jörg Henkel:
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures.
1238-1243
Electronic Edition (link) BibTeX
- Woo-Cheol Kwon, Sung-Min Hong, Sungjoo Yoo, Byeong Min, Kyu-Myung Choi, Soo-Kwan Eo:
An Open-Loop Flow Control Scheme Based on the Accurate Global Information of On-Chip Communication.
1244-1249
Electronic Edition (link) BibTeX
- Ajay K. Verma, Philip Brisk, Paolo Ienne:
Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design.
1250-1255
Electronic Edition (link) BibTeX
- Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne:
Improving Synthesis of Compressor Trees on FPGAs via Integer Linear Programming.
1256-1261
Electronic Edition (link) BibTeX
- Ivano Bonesana, Marco Paolieri, Marco D. Santambrogio:
An adaptable FPGA-based System for Regular Expression Matching.
1262-1267
Electronic Edition (link) BibTeX
- Miroslav N. Velev, Ping Gao:
Comparison of Boolean Satisfiability Encodings on FPGA Detailed Routing Problems.
1268-1273
Electronic Edition (link) BibTeX
- Denis Réal, Cécile Canovas, Jessy Clédière, M'hamed Drissi, Frédéric Valette:
Defeating classical Hardware Countermeasures: a new processing for Side Channel Analysis.
1274-1279
Electronic Edition (link) BibTeX
- Konrad J. Kulikowski, Vyas Venkataraman, Zhen Wang, Alexander Taubin:
Power Balanced Gates Insensitive to Routing Capacitance Mismatch.
1280-1285
Electronic Edition (link) BibTeX
- Elena Dubrova, Maxim Teslenko, Hannu Tenhunen:
On Analysis and Synthesis of (n, k)-Non-Linear Feedback Shift Registers.
1286-1291
Electronic Edition (link) BibTeX
- Junfeng Fan, Lejla Batina, Kazuo Sakiyama, Ingrid Verbauwhede:
FPGA Design for Algebraic Tori-Based Public-Key Cryptography.
1292-1297
Electronic Edition (link) BibTeX
- Ho Fai Ko, Nicola Nicolici:
Automated Trace Signals Identification and State Restoration for Improving Observability in Post-Silicon Validation.
1298-1303
Electronic Edition (link) BibTeX
- A. Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis:
Functional Self-Testing for Bus-Based Symmetric Multiprocessors.
1304-1309
Electronic Edition (link) BibTeX
- B. Straka, Hans A. R. Manhaeve, J. Brenkus, Stefaan Kerckenaere:
Theoretical and Practical Aspects of IDDQ Settling-Impact on Measurement Timing and Quality.
1310-1315
Electronic Edition (link) BibTeX
- Marcello De Matteis, Stefano D'Amico, Andrea Baschirotto:
Advanced Analog Filters for Telecommunications.
1316-1321
Electronic Edition (link) BibTeX
- Georges G. E. Gielen, P. De Wit, E. Maricau, J. Loeckx, J. Martin-Martinez, Ben Kaczer, Guido Groeseneken, R. Rodríguez, M. Nafría:
Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies.
1322-1327
Electronic Edition (link) BibTeX
- Carlotta Guiducci, Alexandre Schmid, Frank K. Gürkaynak, Yusuf Leblebici:
Novel Front-End Circuit Architectures for Integrated Bio-Electronic Interfaces.
1328-1333
Electronic Edition (link) BibTeX
- Anupam Chattopadhyay, Xiaolin Chen, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures.
1334-1339
Electronic Edition (link) BibTeX
- Amin Farmahini Farahani, Seid Mehdi Fakhraie, Saeed Safari:
Scalable Architecture for on-Chip Neural Network Training using Swarm Intelligence.
1340-1345
Electronic Edition (link) BibTeX
- Thomas Marconi, Yi Lu, Koen Bertels, Georgi Gaydadjiev:
Intelligent Merging Online Task Placement Algorithm for Partial Reconfigurable Systems.
1346-1351
Electronic Edition (link) BibTeX
- Antonio Deledda, Claudio Mucci, Arseni Vitkovski, Philippe Bonnot, Arnaud Grasset, P. Millet, Matthias Kühnle, F. Ries, Michael Hübner, Jürgen Becker, Massimo Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Fabio Campi, T. DeMarco:
Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor.
1352-1357
Electronic Edition (link) BibTeX
- Neeraj Suri, Christof Fetzer, Jacob Abraham, Stefan Poledna, Avi Mendelson, Subhasish Mitra:
Dependable Embedded Systems Special Day Panel: Issues and Challenges in Dependable Embedded Systems.
1394-1395
Electronic Edition (link) BibTeX
- Faizal Arya Samman, Thomas Hollstein, Manfred Glesner:
Multicast Parallel Pipeline Router Architecture for Network-on-Chip.
1396-1401
Electronic Edition (link) BibTeX
- Simone Medardoni, Marcello Lajolo, Davide Bertozzi:
Variation tolerant NoC design by means of self-calibrating links.
1402-1407
Electronic Edition (link) BibTeX
- Pejman Lotfi-Kamran, Masoud Daneshtalab, Caro Lucas, Zainalabedin Navabi:
BARP-A Dynamic Routing Protocol for Balanced Distribution of Traffic in NoCs.
1408-1413
Electronic Edition (link) BibTeX
- Igor Loi, Federico Angiolini, Luca Benini:
Developing Mesochronous Synchronizers to Enable 3D NoCs.
1414-1419
Electronic Edition (link) BibTeX
- Arseni Vitkovski, Georgi Kuzmanov, Georgi Gaydadjiev:
Memory Organization with Multi-Pattern Parallel Accesses.
1420-1425
Electronic Edition (link) BibTeX
- Marios Kleanthous, Yiannakis Sazeides:
CATCH: A Mechanism for Dynamically Detecting Cache-Content-Duplication and its Application to Instruction Caches.
1426-1431
Electronic Edition (link) BibTeX
- Sukhun Kang, Rakesh Kumar:
Magellan: A Search and Machine Learning-based Framework for Fast Multi-core Design Space Exploration and Optimization.
1432-1437
Electronic Edition (link) BibTeX
- Raghavendra K, Madhu Mutyam:
Process Variation Aware Issue Queue Design.
1438-1443
Electronic Edition (link) BibTeX
- Claudio Mucci, Luca Vanzolini, Ilario Mirimin, Daniele Gazzola, Antonio Deledda, Sebastian Goller, Joachim Knäblein, Axel Schneider, Luca Ciccarelli, Fabio Campi:
Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array.
1444-1449
Electronic Edition (link) BibTeX
- R. Arteaga, Félix Tobajas, Roberto Esper-Chaín, V. de Armas, Roberto Sarmiento:
GMDS: Hardware implementation of novel real output queuing architecture.
1450-1455
Electronic Edition (link) BibTeX
- Jeremy Buboltz, Taskin Koçak:
Front End Device for Content Networking.
1456-1461
Electronic Edition (link) BibTeX
- Madhura Purnaprajna, Christoph Puttmann, Mario Porrmann:
Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography.
1462-1467
Electronic Edition (link) BibTeX
- Hyun Choi, Abhijit Chatterjee:
Digital bit stream jitter testing using jitter expansion.
1468-1473
Electronic Edition (link) BibTeX
- Irith Pomeranz, Sudhakar M. Reddy:
A Same/Different Fault Dictionary: An Extended Pass/Fail Fault Dictionary with Improved Diagnostic Resolution.
1474-1479
Electronic Edition (link) BibTeX
- A. Ney, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, V. Gouin:
A Design-for-Diagnosis Technique for SRAM Write Drivers.
1480-1485
Electronic Edition (link) BibTeX
- David C. Keezer, Dany Minier, Patrice Ducharme:
Variable Delay of Multi-Gigahertz Digital Signals for Deskew and Jitter-Injection Test Applications.
1486-1491
Electronic Edition (link) BibTeX
- Manuel Hohenauer, Felix Engel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gerrit Bette, Balpreet Singh:
Retargetable Code Optimization for Predicated Execution.
1492-1497
Electronic Edition (link) BibTeX
- Stephen A. Edwards, Nalini Vasudevan, Olivier Tardieu:
Programming Shared Memory Multiprocessors with Deterministic Message-Passing Concurrency: Compiling SHIM to Pthreads.
1498-1503
Electronic Edition (link) BibTeX
- Roberto Lublinerman, Stavros Tripakis:
Modularity vs. Reusability: Code Generation from Synchronous Block Diagrams.
1504-1509
Electronic Edition (link) BibTeX
- Fabiano Cruz, Raimundo S. Barreto, Lucas Cordeiro, Paulo Romero Martins Maciel:
ezRealtime: A Domain-Specific Modeling Tool for Embedded Hard Real-Time Software Synthesis.
1510-1515
Electronic Edition (link) BibTeX
- Bruno Bougard, Paul Marchal, Luca Benini, Doris Keitel-Schulz, N. Checka:
HOT TOPIC - 3D Integration or How to Scale in the 21st Century.
1516
Electronic Edition (link) BibTeX
- Atanu Chattopadhyay, Zeljko Zilic:
Built-in Clock Skew System for On-line Debug and Repair.
248-251
Electronic Edition (link) BibTeX
- Renato Rimolo-Donadio, Christian Schuster, Xiaoxiong Gu, Young Hoon Kwark, Mark B. Ritter:
Analysis and Optimization of the Recessed Probe Launch for High Frequency Measurements of PCB Interconnects.
252-255
Electronic Edition (link) BibTeX
- Ho Fai Ko, Nicola Nicolici:
On Automated Trigger Event Generation in Post-Silicon Validation.
256-259
Electronic Edition (link) BibTeX
- Ken W. Batcher, Robert A. Walker:
Dynamic Round-Robin Task Scheduling to Reduce Cache Misses for Embedded Systems.
260-263
Electronic Edition (link) BibTeX
- Yang Qu, Juha-Pekka Soininen, Jari Nurmi:
Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking.
264-267
Electronic Edition (link) BibTeX
- Mian Dong, Lin Zhong:
Logic Synthesis with Nanowire Crossbar: Reality Check and Standard Cell-based Integration.
268-271
Electronic Edition (link) BibTeX
- Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis:
Merged Computation for Whirlpool Hashing.
272-275
Electronic Edition (link) BibTeX
- Trevor Meyerowitz, Alberto L. Sangiovanni-Vincentelli, Mirko Sauermann, Dominik Langen:
Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor.
276-279
Electronic Edition (link) BibTeX
- Juan Alberto Herreria Garcia:
Safe Automatic Flight Back and Landing of Aircraft Flight Reconfiguration Function (FRF).
280-283
Electronic Edition (link) BibTeX
- Daniela De Venuto, Leonardo Reyneri:
PWM-Based Test Stimuli Generation for BIST of High Resolution ADCs.
284-287
Electronic Edition (link) BibTeX
- Jan Schat:
Fault Clustering in deep-submicron CMOS Processes.
511-514
Electronic Edition (link) BibTeX
- Chunjie Duan, Sunil P. Khatri:
Energy Efficient and High Speed On-Chip Ternary Bus.
515-518
Electronic Edition (link) BibTeX
- Francesco Redaelli, Marco D. Santambrogio, Donatella Sciuto:
Task Scheduling with Configuration Prefetching and Anti-Fragmentation techniques on Dynamically Reconfigurable Systems.
519-522
Electronic Edition (link) BibTeX
- Almitra Pradhan, Ranga Vemuri:
Fast Analog Circuit Synthesis Using Sensitivity Based Near Neighbor Searches.
523-526
Electronic Edition (link) BibTeX
- Bao Liu:
Spatial Correlation Extraction via Random Field Simulation and Production Chip Performance Regression.
527-532
Electronic Edition (link) BibTeX
- Mohamed El Mongi Ben Gaid, Rémy Kocik, Yves Sorel, Rédha Hamouche:
A methodology for improving software design lifecycle in embedded control systems.
533-536
Electronic Edition (link) BibTeX
- Wanping Zhang, Yi Zhu, Wenjian Yu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Nuriyoki Ito, Chung-Kuan Cheng:
Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network.
537-540
Electronic Edition (link) BibTeX
- Benjamin Glas, Alexander Klimm, Oliver Sander, Klaus D. Müller-Glaser, Jürgen Becker:
A System Architecture for Reconfigurable Trusted Platforms.
541-544
Electronic Edition (link) BibTeX
- Frank Rogin, Thomas Klotz, Görschwin Fey, Rolf Drechsler, Steffen Rülke:
Automatic Generation of Complex Properties for Hardware Designs.
545-548
Electronic Edition (link) BibTeX
- Martin Versen, Achim Schramm, Jan Schnepp, Dorina Diaconescu:
Test Instrumentation for a Laser Scanning Localization Technique for Analysis of High Speed DRAM devices.
776-779
Electronic Edition (link) BibTeX
- Bastian Ristau, Torsten Limberg, Gerhard Fettweis:
A Mapping Framework for Guided Design Space Exploration of Heterogeneous MP-SoCs.
780-783
Electronic Edition (link) BibTeX
- Josef Haid, Bernd Zimek, Thomas Leutgeb, Thomas Kunemund:
Impact of Leakage Current on Data Retention of RF-powered Devices During Amplitude-Modulation-based Communication.
784-787
Electronic Edition (link) BibTeX
- Martin Radetzki, Rauf Salimi Khaligh:
Accuracy-Adaptive Simulation of Transaction Level Models.
788-791
Electronic Edition (link) BibTeX
- Jun Wang, Hongbo Zeng, Kun Huang, Ge Zhang, Yan Tang:
Zero-Efficient Buffer Design for Reliable Network-on-Chip in Tiled Chip-Multi-Processor.
792-795
Electronic Edition (link) BibTeX
- Fu-Wei Chen, Yi-Yu Liu:
Wire Sizing Alternative - An Uniform Dual-rail Routing Architecture.
796-799
Electronic Edition (link) BibTeX
- Xiaoying Wang, Lars Hedrich:
Structural Synthesis of Four-Quadrant Multiplier Based on Hierarchical Topology.
800-803
Electronic Edition (link) BibTeX
- Alexandre Lewicki, Javier del Prado Pavon, Jacky Talayssat, Eric Dekneuvel, Gilles Jacquemod:
A Virtual Prototype for Bluetooth over Ultra Wide Band System Level Design.
804-807
Electronic Edition (link) BibTeX
- Feng Yuan, Lin Huang, Qiang Xu:
Re-Examining the Use of Network-on-Chip as Test Access Mechanism.
808-811
Electronic Edition (link) BibTeX
- Simone Zezza, Guido Masera:
VLSI implementation of SISO arithmetic decoders for joint source channel coding.
1075-1078
Electronic Edition (link) BibTeX
- Stephen Frechette, Fabrizio Lombardi:
Error Detection/Correction in DNA Algorithmic Self-Assembly.
1079-1082
Electronic Edition (link) BibTeX
- Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng:
Temperature-Aware Voltage Selection for Energy Optimization.
1083-1086
Electronic Edition (link) BibTeX
- Lei Fang, Michael S. Hsiao:
A Fast Approximation Algorithm for MIN-ONE SAT.
1087-1090
Electronic Edition (link) BibTeX
- Jun-Kuei Zeng, Chung-Ping Chen:
Deep Submicron Interconnect Timing Model with Quadratic Random Variable Analysis.
1091-1094
Electronic Edition (link) BibTeX
- Yi Lu, Thomas Marconi, Georgi Gaydadjiev, Koen Bertels:
An efficient algorithm for free resources management on the FPGA.
1095-1098
Electronic Edition (link) BibTeX
- Hiroaki Yoshida, Masahiro Fujita:
Performance-Constrained Different Cell Count Minimization for Continuously-Sized Circuits.
1099-1102
Electronic Edition (link) BibTeX
- Sudarshan Bahukudumbi, Krishnendu Chakrabarty, Richard Kacprowicz:
Test Scheduling for Wafer-Level Test-During-Burn-In of Core-Based SoCs.
1103-1106
Electronic Edition (link) BibTeX
- Patrick Scheer, Ernst Schmidt, Stefan Burges:
CARbridge, Reduction of System Complexity by Standardisation of the System-Basis-Chips for Automotive Applications.
1107-1110
Electronic Edition (link) BibTeX
- Mark Muir, Tughrul Arslan, Iain Lindsay:
Automated Dynamic Throughput-constrained Structural-level Pipelining in Streaming Applications.
1358-1361
Electronic Edition (link) BibTeX
- Francis G. Wolff, Christos A. Papachristou, Swarup Bhunia, Rajat Subhra Chakraborty:
Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme.
1362-1365
Electronic Edition (link) BibTeX
- Tomokazu Yoneda, Hideo Fujiwara:
Wrapper and TAM Co-Optimization for Reuse of SoC Functional Interconnects.
1366-1369
Electronic Edition (link) BibTeX
- Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan:
De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs.
1370-1373
Electronic Edition (link) BibTeX
- Lan S. Bai, Haris Lekatsas, Robert P. Dick:
Adaptive Filesystem Compression for Embedded Systems.
1374-1377
Electronic Edition (link) BibTeX
- David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller:
Partially Redundant Logic Detection Using Symbolic Equivalence Checking in Reversible and Irreversible Logic Circuits.
1378-1381
Electronic Edition (link) BibTeX
- Per Lindgren, Johan Eriksson, Simon Aittamaa, Johan Nordlander:
TinyTimber, Reactive Objects in C for Real-Time Embedded Systems.
1382-1385
Electronic Edition (link) BibTeX
- Eduardo Wenzel Brião, Daniel Barcelos, Flávio Rech Wagner:
Dynamic Task Allocation Strategies in MPSoC for Soft Real-time Applications.
1386-1389
Electronic Edition (link) BibTeX
- Pierluigi Nuzzo, Claudio Nani, Sergio Saponara, Luca Fanucci, Geert Van der Plas:
Mixed-Signal Design Space Exploration of Time-Interleaved A/D Converters for Ultra-Wide Band Applications.
1390-1393
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:05:42 2009
by Michael Ley (ley@uni-trier.de)