Kei-Yong Khoo

2008
23	EE	Chao-Yue Lai, Chung-Yang Huang, Kei-Yong Khoo: Improving Constant-Coefficient Multiplier Verification by Partial Product Identification. DATE 2008: 813-818
2005
22	EE	Kei-Yong Khoo, Alan N. Willson Jr.: Efficient VLSI implementation of N/N integer division. ISCAS (1) 2005: 672-675
2003
21	EE	Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr.: Optimal joint module-selection and retiming with carry-save representation. IEEE Trans. on CAD of Integrated Circuits and Systems 22(7): 836-846 (2003)
2001
20	EE	Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.: Design of optimal hybrid form FIR filter. ISCAS (2) 2001: 621-624
19	EE	Jason Cong, Jie Fang, Kei-Yong Khoo: DUNE-a multilayer gridless routing system. IEEE Trans. on CAD of Integrated Circuits and Systems 20(5): 633-647 (2001)
2000
18	EE	Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr.: The use of carry-save representation in joint module selection and retiming. DAC 2000: 768-773
17	EE	Jason Cong, Jie Fang, Kei-Yong Khoo: DUNE: a multi-layer gridless routing system with wire planning. ISPD 2000: 12-18
16	EE	Jason Cong, Jie Fang, Kei-Yong Khoo: Via design rule consideration in multilayer maze routing algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 215-223 (2000)
1999
15	EE	Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.: Bit-level arithmetic optimization for carry-save additions. ICCAD 1999: 14-19
14	EE	Jason Cong, Jie Fang, Kei-Yong Khoo: An implicit connection graph maze routing algorithm for ECO routing. ICCAD 1999: 163-167
13	EE	Kei-Yong Khoo, Chao-Liang Chen, Alan N. Willson Jr.: A CMOS pipelined carry-save array using true single-phase single-transistor-latch clocking. ISCAS (1) 1999: 298-301
12	EE	Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.: Improved-Booth encoding for low-power multipliers. ISCAS (1) 1999: 62-65
11	EE	Jason Cong, Jie Fang, Kei-Yong Khoo: VIA design rule consideration in multi-layer maze routing algorithms. ISPD 1999: 214-220
1997
10	EE	Jason Cong, David Zhigang Pan, Lei He, Cheng-Kok Koh, Kei-Yong Khoo: Interconnect design for deep submicron ICs. ICCAD 1997: 478-485
1996
9	EE	Kei-Yong Khoo, Alan N. Willson Jr.: Cycle-Based Timing Simulations Using Event-Stream. ICCD 1996: 460-
1995
8	EE	Kei-Yong Khoo, Alan N. Willson Jr.: Single-transistor transparent-latch clocking. ARVLSI 1995: 331-341
7		Chao-Liang Chen, Kei-Yong Khoo, Alan N. Willson Jr.: An Improved Polynomial-Time Algorithm for Designing Digital Filters with Power-of-Two Coefficients. ISCAS 1995: 223-226
6	EE	Kei-Yong Khoo, Alan N. Willson Jr.: Charge recovery on a databus. ISLPD 1995: 185-189
5	EE	Kei-Yong Khoo, Jason Cong: An efficient multilayer MCM router based on four-via routing. IEEE Trans. on CAD of Integrated Circuits and Systems 14(10): 1277-1290 (1995)
1994
4		Kei-Yong Khoo, Alan N. Willson Jr.: Low Power CMOS Clock Buffer. ISCAS 1994: 355-358
1993
3	EE	Kei-Yong Khoo, Jason Cong: An Efficient Multilayer MCM Router Based on Four-Via Routing. DAC 1993: 590-595
2		Kei-Yong Khoo, Alan Kwentus, Alan N. Willson Jr.: An efficient 175 MHz programmable FIR digital filter. ISCAS 1993: 72-75
1991
1		Jason Cong, Kei-Yong Khoo: A Provable Near-Optimal Algorithm for the Channel Pin Assignment Problem. ICCD 1991: 319-322

Coauthor Index

1	Chao-Liang Chen	[7] [13]
2	Jason Cong	[1] [3] [5] [10] [11] [14] [16] [17] [19]
3	Jie Fang	[11] [14] [16] [17] [19]
4	Lei He	[10]
5	Chung-Yang Huang	[23]
6	Cheng-Kok Koh	[10]
7	Alan Kwentus	[2]
8	Chao-Yue Lai	[23]
9	David Z. Pan (David Zhigang Pan)	[10]
10	Alan N. Willson Jr.	[2] [4] [6] [7] [8] [9] [12] [13] [15] [18] [20] [21] [22]
11	Zhan Yu	[12] [15] [18] [20] [21]

Colors in the list of coauthors