2009 |
10 | EE | Saurabh K. Tiwary,
Amith Singhee,
Vikas Chandra:
Robust Circuit Design: Challenges and Solutions.
VLSI Design 2009: 41-42 |
2008 |
9 | EE | Amith Singhee,
Sonia Singhal,
Rob A. Rutenbar:
Exploiting Correlation Kernels for Efficient Handling of Intra-Die Spatial Correlation, with Application to Statistical Timing.
DATE 2008: 856-861 |
8 | EE | Amith Singhee,
Sonia Singhal,
Rob A. Rutenbar:
Practical, fast Monte Carlo statistical static timing analysis: why and how.
ICCAD 2008: 190-195 |
7 | EE | Amith Singhee,
Jiajing Wang,
Benton H. Calhoun,
Rob A. Rutenbar:
Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design.
VLSI Design 2008: 131-136 |
6 | EE | Amith Singhee,
Claire Fang Fang,
James D. Ma,
Rob A. Rutenbar:
Probabilistic Interval-Valued Computation: Toward a Practical Surrogate for Statistics Inside CAD Tools.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2317-2330 (2008) |
2007 |
5 | EE | Amith Singhee,
Rob A. Rutenbar:
Beyond Low-Order Statistical Response Surfaces: Latent Variable Regression for Efficient, Highly Nonlinear Fitting.
DAC 2007: 256-261 |
4 | EE | Amith Singhee,
Rob A. Rutenbar:
Statistical blockade: a novel method for very fast Monte Carlo simulation of rare circuit events, and its application.
DATE 2007: 1379-1384 |
3 | EE | Amith Singhee,
Rob A. Rutenbar:
From Finance to Flip Flops: A Study of Fast Quasi-Monte Carlo Methods from Computational Finance Applied to Statistical Circuit Analysis.
ISQED 2007: 685-692 |
2006 |
2 | EE | Amith Singhee,
Claire Fang Fang,
James D. Ma,
Rob A. Rutenbar:
Probabilistic interval-valued computation: toward a practical surrogate for statistics inside CAD tools.
DAC 2006: 167-172 |
2002 |
1 | EE | Hongzhou Liu,
Amith Singhee,
Rob A. Rutenbar,
L. Richard Carley:
Remembrance of circuits past: macromodeling by data mining in large analog design spaces.
DAC 2002: 437-442 |