Zhi Zhu

2008
3	EE	Wanping Zhang, Yi Zhu, Wenjian Yu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Nuriyoki Ito, Chung-Kuan Cheng: Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network. DATE 2008: 537-540
2007
2	EE	Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng: Fast power network analysis with multiple clock domains. ICCD 2007: 456-463
2004
1	EE	Vishak Venkatraman, Andrew Laffely, Jinwook Jang, Hempraveen Kukkamalla, Zhi Zhu, Wayne Burleson: NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods. SLIP 2004: 69-75

Coauthor Index

1	Wayne P. Burleson (Wayne Burleson)	[1]
2	Chung-Kuan Cheng	[2] [3]
3	Lew Chua-Eoan	[2] [3]
4	Noriyuki Ito	[2]
5	Nuriyoki Ito	[3]
6	Jinwook Jang	[1]
7	Hempraveen Kukkamalla	[1]
8	Andrew Laffely	[1]
9	Rajeev Murgai	[2] [3]
10	He Peng	[2] [3]
11	Rui Shi	[2] [3]
12	Toshiyuki Shibuya	[2] [3]
13	Vishak Venkatraman	[1]
14	Wenjian Yu	[3]
15	Ling Zhang	[2] [3]
16	Wanping Zhang	[2] [3]
17	Yi Zhu	[3]

Colors in the list of coauthors