2008 |
50 | EE | Manuel J. Barragan Asian,
Diego Vázquez,
Adoración Rueda:
Practical Implementation of a Network Analyzer for Analog BIST Applications.
DATE 2008: 80-85 |
49 | EE | Rafaella Fiorelli,
Fernando Silveira,
Eduardo J. Peralías,
Diego Vázquez,
Adoración Rueda,
José Luis Huertas:
A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model.
SBCCI 2008: 70-75 |
2007 |
48 | EE | Antonio J. Ginés,
Eduardo J. Peralías,
Adoración Rueda:
Improved Background Algorithms for Pipeline ADC Full Calibration.
ISCAS 2007: 3383-3386 |
47 | EE | Antonio J. Ginés,
Eduardo J. Peralías,
Adoración Rueda:
Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS.
SBCCI 2007: 21-26 |
2006 |
46 | | Manuel J. Barragan Asian,
Diego Vázquez,
Adoración Rueda:
A Sinewave Analyzer for Mixed-Signal BIST Applications in a 0.35µm Technology.
DDECS 2006: 119-124 |
45 | EE | Gildas Leger,
Adoración Rueda:
Experimental Validation of a Fully Digital BISTfor Cascaded Sigma Delta Modulators.
European Test Symposium 2006: 131-136 |
44 | EE | Antonio J. Ginés,
Eduardo J. Peralías,
Adoración Rueda:
Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs.
ISCAS 2006 |
2005 |
43 | EE | Antonio J. Ginés,
Eduardo J. Peralías,
Adoración Rueda:
Full calibration digital techniques for pipeline ADCs.
ISCAS (3) 2005: 1976-1979 |
42 | EE | Adoración Rueda,
Michel Renovell,
José Luis Huertas:
Guest Editorial.
J. Electronic Testing 21(3): 203 (2005) |
41 | EE | Diego Vázquez,
Gloria Huertas,
África Luque,
Manuel J. Barragan Asian,
Gildas Leger,
Adoración Rueda,
José Luis Huertas:
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST.
J. Electronic Testing 21(3): 221-232 (2005) |
2004 |
40 | EE | Diego Vázquez,
Gildas Leger,
Gloria Huertas,
Adoración Rueda,
José L. Huertas:
A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications.
DATE 2004: 298-305 |
39 | EE | Gildas Leger,
Adoración Rueda:
A Digital Test for First-Order [Sigma-Delta] Modulators.
DATE 2004: 708-709 |
38 | EE | Antonio J. Ginés,
Eduardo J. Peralías,
Adoración Rueda:
Digital Background Gain Error Correction in Pipeline ADCs.
DATE 2004: 82-87 |
2003 |
37 | EE | Esther Rodríguez-Villegas,
Alberto Yufera,
Adoración Rueda:
A Charge Correction Cell for FGMOS-Based Circuits.
SBCCI 2003: 191- |
36 | EE | Antonio J. Ginés,
Eduardo J. Peralías,
Adoración Rueda:
Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages.
SBCCI 2003: 317-322 |
35 | EE | Gloria Huertas,
Diego Vázquez,
Adoración Rueda,
José L. Huertas:
Oscillation-based test in bandpass oversampled A/D converters.
Microelectronics Journal 34(10): 927-936 (2003) |
2002 |
34 | EE | Antonio J. Ginés,
Eduardo J. Peralías,
Adoración Rueda,
Ralf Seepold,
Natividad Martínez Madrid:
A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects.
DATE 2002: 310-315 |
33 | EE | Gloria Huertas,
Diego Vázquez,
Adoración Rueda,
José L. Huertas:
Practical Oscillation-Based Test in Analog Integrated Filters: Experimental Results.
DELTA 2002: 18-24 |
32 | EE | Diego Vázquez,
Gloria Huertas,
Gildas Leger,
Adoración Rueda,
José L. Huertas:
Practical solutions for the application of the oscillation-based-test in analog integrated circuits.
ISCAS (1) 2002: 589-592 |
31 | EE | Esther Rodríguez-Villegas,
Adoración Rueda,
Alberto Yufera:
A micropower log domain FGMOS filter.
ISCAS (3) 2002: 317-320 |
30 | EE | Esther Rodríguez-Villegas,
José M. Quintana,
Maria J. Avedillo,
Adoración Rueda:
High-speed low-power logic gates using floating gates.
ISCAS (5) 2002: 389-392 |
29 | EE | Diego Vázquez,
Gloria Huertas,
Gildas Leger,
Adoración Rueda,
José L. Huertas:
Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation.
VTS 2002: 433-438 |
28 | EE | Gloria Huertas,
Diego Vázquez,
Eduardo J. Peralías,
Adoración Rueda,
José Luis Huertas:
Practical Oscillation-Based Test of Integrated Filters.
IEEE Design & Test of Computers 19(6): 64-72 (2002) |
27 | EE | Gloria Huertas,
Diego Vázquez,
Eduardo J. Peralías,
Adoración Rueda,
José Luis Huertas:
Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell.
IEEE Design & Test of Computers 19(6): 73-82 (2002) |
2001 |
26 | EE | Natividad Martínez Madrid,
Eduardo J. Peralías,
Antonio J. Acosta,
Adoración Rueda:
Analog/mixed-signal IP modeling for design reuse.
DATE 2001: 766-767 |
25 | EE | Eduardo J. Peralías,
Adoración Rueda,
José L. Huertas:
Structural testing of pipelined analog to digital converters.
ISCAS (1) 2001: 436-439 |
24 | EE | Esther Rodríguez-Villegas,
Adoración Rueda,
Alberto Yufera:
A 1.25 V FGMOS filter using translinear circuits.
ISCAS (1) 2001: 61-64 |
23 | EE | Eduardo J. Peralías,
Gloria Huertas,
Adoración Rueda,
José L. Huertas:
Self-Testable Pipelined ADC with Low Hardware Overhead.
VTS 2001: 272-278 |
22 | EE | Eduardo J. Peralías,
Adoración Rueda,
José Luis Huertas:
New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters.
J. Electronic Testing 17(5): 373-383 (2001) |
2000 |
21 | EE | Gloria Huertas,
Diego Vázquez,
Eduardo J. Peralías,
Adoración Rueda,
José L. Huertas:
Testing mixed-signal cores: practical oscillation-based test in an analog macrocell.
Asian Test Symposium 2000: 31-38 |
20 | EE | Eduardo J. Peralías,
Antonio J. Acosta,
Adoración Rueda,
José L. Huertas:
A Vhdl-Based Methodology for Design and Verification of Pipeline A/D Converters.
DATE 2000: 534-538 |
19 | EE | Raúl Jiménez,
Antonio J. Acosta,
Eduardo J. Peralías,
Adoración Rueda:
An Application of Self-Timed Circuits to the Reduction of Switching Noise in Analog-Digital Circuits.
PATMOS 2000: 295-305 |
18 | EE | Gloria Huertas,
Diego Vázquez,
Adoración Rueda,
José L. Huertas:
Built-In Self-Test in Mixed-Signal ICs: A DTMF Macrocell.
VLSI Design 2000: 568-571 |
1999 |
17 | EE | Esther Rodríguez-Villegas,
Maria J. Avedillo,
José M. Quintana,
Gloria Huertas,
Adoración Rueda:
vMOS-based sorters for multiplier implementations.
ISCAS (1) 1999: 338-341 |
16 | EE | Alberto Yufera,
Adoración Rueda:
Programmable low-voltage continuous-time filter for audio applications.
ISCAS (2) 1999: 200-203 |
15 | | Gloria Huertas,
Diego Vázquez,
Adoración Rueda,
José L. Huertas:
Effective oscillation-based test for application to a DTMF filter bank.
ITC 1999: 549-555 |
1998 |
14 | EE | Salvador Mir,
Adoración Rueda,
Diego Vázquez,
José Luis Huertas:
Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems.
DATE 1998: 810-814 |
13 | EE | Juan A. Prieto,
Adoración Rueda,
Ian A. Grout,
Eduardo J. Peralías,
José L. Huertas,
Andrew M. D. Richardson:
An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits.
DATE 1998: 905- |
12 | EE | Eduardo J. Peralías,
Adoración Rueda,
Juan A. Prieto,
José L. Huertas:
DfT and on-line test of high-performance data converters: a practical case.
ITC 1998: 534- |
1997 |
11 | EE | Salvador Mir,
Adoración Rueda,
Thomas Olbrich,
Eduardo J. Peralías,
José Luis Huertas:
SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems.
DAC 1997: 281-286 |
10 | EE | Juan A. Prieto,
Adoración Rueda,
José M. Quintana,
José Luis Huertas:
A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs.
ED&TC 1997: 389-394 |
9 | | Bozena Kaminska,
Karim Arabi,
I. Bell,
José L. Huertas,
B. Kim,
Adoración Rueda,
Mani Soma,
Prashant Goteti:
Analog and Mixed-Signal Benchmark Circuits-First Release.
ITC 1997: 183-190 |
8 | EE | Eduardo J. Peralías,
Adoración Rueda,
José L. Huertas:
A DFT Technique for Analog-to-Digital Converters with digital correction.
VTS 1997: 302-307 |
1996 |
7 | EE | Diego Vázquez,
José L. Huertas,
Adoración Rueda:
Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design.
VTS 1996: 42-47 |
1995 |
6 | EE | Eduardo J. Peralías,
Adoración Rueda,
José Luis Huertas:
Statistical behavioral modeling and characterization of A/D converters.
ICCAD 1995: 562-566 |
5 | EE | Diego Vázquez,
Adoración Rueda,
José L. Huertas:
A solution for the on-line test of analog ladder filters.
VTS 1995: 48-53 |
1994 |
4 | | Diego Vázquez,
Adoración Rueda,
José L. Huertas:
A Low-Cost Strategy for Testing Analog Filters.
ISCAS 1994: 123-126 |
3 | | Alberto Yufera,
Adoración Rueda,
José L. Huertas:
A Study of the Sensitivity of Switched-Current Wave Analog Filters to Mismatching and Clock-Feedthrough Errors.
ISCAS 1994: 317-320 |
2 | | Juan A. Prieto,
José M. Quintana,
Adoración Rueda,
José L. Huertas:
An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits.
ISCAS 1994: 491-494 |
1993 |
1 | EE | José Luis Huertas,
Adoración Rueda,
Diego Vázquez:
Improving the testability of switched-capacitor filters.
J. Electronic Testing 4(4): 299-313 (1993) |