Savithri Sundareswaran

2009
18	EE	Savithri Sundareswaran, Rajendran Panda, Jacob A. Abraham, Yun Zhang, Amit Mittal: Characterization of sequential cells for constraint sensitivities. ISQED 2009: 74-79
2008
17	EE	Brian Cline, Kaviraj Chopra, David Blaauw, Andres Torres, Savithri Sundareswaran: Transistor-Specific Delay Modeling for SSTA. DATE 2008: 592-597
16	EE	Savithri Sundareswaran, Jacob A. Abraham, Alexandre Ardelea, Rajendran Panda: Characterization of Standard Cells for Intra-Cell Mismatch Variations. ISQED 2008: 213-219
15	EE	Savithri Sundareswaran, Lucie Nechanicka, Rajendran Panda, Sergey Gavrilov, Roman Solovyev, Jacob A. Abraham: A timing methodology considering within-die clock skew variations. SoCC 2008: 351-356
2007
14	EE	Min Zhao, Rajendran Panda, Ben Reschke, Yuhong Fu, Trudi Mewett, Sri Chandrasekaran, Savithri Sundareswaran, Shu Yan: On-Chip Decoupling Capacitance and P/G Wire Co-optimization for Dynamic Noise. DAC 2007: 162-167
13	EE	Yuhong Fu, Rajendran Panda, Ben Reschke, Savithri Sundareswaran, Min Zhao: A novel technique for incremental analysis of on-chip power distribution networks. ICCAD 2007: 817-823
12	EE	Rajeshwary Tayade, Savithri Sundareswaran, Jacob A. Abraham: Small-Delay Defect Detection in the Presence of Process Variations. ISQED 2007: 711-716
2006
11	EE	Min Zhao, Rajendran Panda, Savithri Sundareswaran, Shu Yan, Yuhong Fu: A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming. DAC 2006: 217-222
10	EE	Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda: Optimal placement of power-supply pads and pins. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 144-154 (2006)
2004
9	EE	Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda: Optimal placement of power supply pads and pins. DAC 2004: 165-170
8	EE	Sanjay Pant, David Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda: A stochastic approach To power grid analysis. DAC 2004: 171-176
2003
7	EE	Sanjay Pant, David Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda: Vectorless Analysis of Supply Noise Induced Delay Variation. ICCAD 2003: 184-192
6	EE	Rajendran Panda, Savithri Sundareswaran, David Blaauw: Impact of Low-Impedance Substrate on Power Supply Integrity. IEEE Design & Test of Computers 20(3): 16-22 (2003)
2002
5	EE	David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran: Slope propagation in static timing analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1180-1195 (2002)
2001
4	EE	Rajendran Panda, Savithri Sundareswaran, David Blaauw: On the interaction of power distribution network with substrate. ISLPED 2001: 388-393
2000
3		David Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Chanhee Oh, Rajendran Panda: Slope Propagation in Static Timing Analysis. ICCAD 2000: 338-343
2	EE	Savithri Sundareswaran, R. Venkatesan, S. Bhaskar: An Assertion Based Technique for Transistor Level Dynamic Power Estimation. VLSI Design 2000: 34-37
1999
1	EE	Savithri Sundareswaran, David Blaauw, Abhijit Dharchoudhury: A Three-Tier Assertion Technique for Spice Verification of Transistor Level Timing Analysis. VLSI Design 1999: 175-180

Coauthor Index

1	Jacob A. Abraham	[12] [15] [16] [18]
2	Alexandre Ardelea	[16]
3	S. Bhaskar	[2]
4	David Blaauw (David T. Blaauw)	[1] [3] [4] [5] [6] [7] [8] [17]
5	Sri Chandrasekaran	[14]
6	Kaviraj Chopra	[17]
7	Brian Cline	[17]
8	Abhijit Dharchoudhury	[1]
9	Yuhong Fu	[9] [10] [11] [13] [14]
10	Sergey Gavrilov	[15]
11	Trudi Mewett	[14]
12	Amit Mittal	[18]
13	Lucie Nechanicka	[15]
14	Chanhee Oh	[3]
15	Rajendran Panda	[3] [4] [6] [7] [8] [9] [10] [11] [13] [14] [15] [16] [18]
16	Sanjay Pant	[7] [8]
17	Ben Reschke	[13] [14]
18	Roman Solovyev	[15]
19	Rajeshwary Tayade	[12]
20	Andres Torres	[17]
21	R. Venkatesan	[2]
22	Shu Yan	[11] [14]
23	Yun Zhang	[18]
24	Min Zhao	[9] [10] [11] [13] [14]
25	Vladimir Zolotov	[3] [5] [7] [8] [9] [10]

Colors in the list of coauthors