| 2008 |
|---|
| 14 | EE | Wenjing Rao,
Alex Orailoglu:
Towards fault tolerant parallel prefix adders in nanoelectronic systems.
DATE 2008: 360-365 |
| 13 | EE | Ilia Polian,
Wenjing Rao:
Selective Hardening of NanoPLA Circuits.
DFT 2008: 263-271 |
| 2007 |
|---|
| 12 | EE | Wenjing Rao,
Alex Orailoglu,
Ramesh Karri:
Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs.
DATE 2007: 865-869 |
| 11 | EE | Wenjing Rao,
Alex Orailoglu,
Ramesh Karri:
Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays.
DSN 2007: 216-224 |
| 10 | EE | Wenjing Rao,
Alex Orailoglu,
Ramesh Karri:
Towards Nanoelectronics Processor Architectures.
J. Electronic Testing 23(2-3): 235-254 (2007) |
| 2006 |
|---|
| 9 | EE | Wenjing Rao,
Alex Orailoglu,
Ramesh Karri:
Topology aware mapping of logic functions onto nanowire-based crossbar architectures.
DAC 2006: 723-726 |
| 8 | EE | Wenjing Rao,
Alex Orailoglu,
Ramesh Karri:
Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics.
European Test Symposium 2006: 63-68 |
| 7 | EE | Wenjing Rao,
Alex Orailoglu,
Ramesh Karri:
Nanofabric Topologies and Reconfiguration Algorithms to Support Dynamically Adaptive Fault Tolerance.
VTS 2006: 214-221 |
| 2005 |
|---|
| 6 | EE | Wenjing Rao,
Alex Orailoglu,
Ramesh Karri:
Fault tolerant nanoelectronic processor architectures.
ASP-DAC 2005: 311-316 |
| 5 | EE | Wenjing Rao,
Alex Orailoglu,
Ramesh Karri:
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors.
ICCD 2005: 533-542 |
| 2004 |
|---|
| 4 | EE | Wenjing Rao,
Alex Orailoglu,
G. Su:
Frugal linear network-based test decompression for drastic test cost reductions.
ICCAD 2004: 721-725 |
| 3 | EE | Wenjing Rao,
Alex Orailoglu,
Ramesh Karri:
Fault Tolerant Arithmetic with Applications in Nanotechnology based Systems.
ITC 2004: 472-478 |
| 2003 |
|---|
| 2 | EE | Wenjing Rao,
Ismet Bayraktaroglu,
Alex Orailoglu:
Test application time and volume compression through seed overlapping.
DAC 2003: 732-737 |
| 1 | EE | Wenjing Rao,
Alex Orailoglu:
Virtual Compression through Test Vector Stitching for Scan Based Designs.
DATE 2003: 10104-10109 |
