2008 | ||
---|---|---|
48 | EE | Yang Qu, Juha-Pekka Soininen, Jari Nurmi: Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking. DATE 2008: 264-267 |
47 | EE | Claudio Brunelli, Fabio Garzia, Jari Nurmi, Fabio Campi, Damien Picard: Reconfigurable hardware: The holy grail of matching performance with programming productivity. FPL 2008: 409-414 |
46 | EE | Claudio Brunelli, Fabio Garzia, Carmelo Giliberto, Jari Nurmi: A dedicated DMA logic addressing a time multiplexed memory to reduce the effects of the system bus bottleneck. FPL 2008: 487-490 |
45 | EE | Fabio Garzia, Claudio Brunelli, Davide Rossi, Jari Nurmi: Implementation of a floating-point matrix-vector multiplication on a reconfigurable architecture. IPDPS 2008: 1-6 |
44 | EE | Luciano Ost, Fernando Gehm Moraes, Leandro Möller, Leandro Soares Indrusiak, Manfred Glesner, Sanna Määttä, Jari Nurmi: A simplified executable model to evaluate latency and throughput of networks-on-chip. SBCCI 2008: 170-175 |
43 | EE | Claudio Brunelli, Fabio Campi, Claudio Mucci, Davide Rossi, Tapani Ahonen, Juha Kylliäinen, Fabio Garzia, Jari Nurmi: Design space exploration of an open-source, IP-reusable, scalable floating-point engine for embedded applications. Journal of Systems Architecture - Embedded Systems Design 54(12): 1143-1154 (2008) |
2007 | ||
42 | EE | Yang Qu, Juha-Pekka Soininen, Jari Nurmi: Interactive presentation: Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices. DATE 2007: 147-152 |
41 | EE | Yang Qu, Juha-Pekka Soininen, Jari Nurmi: A Genetic Algorithm for Scheduling Tasks onto Dynamically Reconfigurable Hardware. ISCAS 2007: 161-164 |
40 | EE | Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen, Jari Nurmi: System-Level Design for Partially Reconfigurable Hardware. ISCAS 2007: 2738-2741 |
39 | Fabio Garzia, Claudio Brunelli, Andrea Ferro, Jari Nurmi: Implementation of a 2D low-pass image filtering algorithm on a reconfigurable device. ReCoSoC 2007: 166-170 | |
38 | Sanna Määttä, Jari Nurmi: Experiences of Using Object Oriented Programming Methods in High Level Network-on-Chip and System-on-Chip Design. ReCoSoC 2007: 84-89 | |
37 | EE | C. P. Ravikumar, Jari Nurmi: Conference Reports. IEEE Design & Test of Computers 24(2): 202-203 (2007) |
36 | EE | Xin Wang, Tapani Ahonen, Jari Nurmi: Applying CDMA Technique to Network-on-Chip. IEEE Trans. VLSI Syst. 15(10): 1091-1100 (2007) |
35 | EE | Yang Qu, Juha-Pekka Soininen, Jari Nurmi: Static scheduling techniques for dependent tasks on dynamically reconfigurable devices. Journal of Systems Architecture 53(11): 861-876 (2007) |
2006 | ||
34 | EE | Yang Qu, Juha-Pekka Soininen, Jari Nurmi: A parallel configuration model for reducing the run-time reconfiguration overhead. DATE 2006: 965-969 |
33 | Heikki Kariniemi, Jari Nurmi: Fault-Tolerant 2-D Mesh Network-on-Chip for Multi-Processor System-on-Chip. DDECS 2006: 186-191 | |
32 | EE | Heikki Kariniemi, Jari Nurmi: On-Line Reconfigurable XGFT Network-on-Chip Designed for Improving the Fault-Tolerance and Manufacturability of the MPSoC Chips. FPL 2006: 1-6 |
31 | EE | Xin Wang, Tapani Ahonen, Jari Nurmi: Prototyping a Globally Asynchronous Locally Synchronous Network-On-Chip on a Conventional FPGA Device Using Synchronous Design Tools. FPL 2006: 1-6 |
30 | Claudio Brunelli, Fabio Garzia, Jari Nurmi: A Coarse-Grain Reconfigurable Machine with Floating-Point Arithmetic Capabilities. ReCoSoC 2006: 1-7 | |
2005 | ||
29 | Heikki Kariniemi, Jari Nurmi: Fault-Tolerant XGFT Network-On-Chip for Multi-Processor System-on-Chip Circuits. FPL 2005: 203-210 | |
28 | Tapani Ahonen, Jari Nurmi: Integration of a NoC-Based Multimedia Processing Platform. FPL 2005: 606-611 | |
27 | Yang Qu, Juha-Pekka Soininen, Jari Nurmi: An Efficient Approach to Hide the Run-Time Reconfiguration from SW Applications. FPL 2005: 648-653 | |
26 | EE | Jari Nurmi, Jan Madsen, Erwin Ofner, Jouni Isoaho, Hannu Tenhunen: The SoC-Mobinet Model in System-on-Chip Education. MSE 2005: 71-72 |
25 | David A. Sigüenza-Tortosa, Jari Nurmi: System Monitoring and Reconfiguration in Proteo NoC. ReCoSoC 2005: 99-104 | |
24 | EE | Lasse Harju, Mika Kuulusa, Jari Nurmi: Flexible Implementation of a WCDMA Rake Receiver. VLSI Signal Processing 39(1-2): 147-160 (2005) |
2004 | ||
23 | EE | Tapio Ristimäki, Jari Nurmi: Virtualizing the Dimensions of a Coarse-Grained Reconfigurable Array. FPL 2004: 1130-1132 |
22 | Heikki Kariniemi, Jari Nurmi: Improved multicast switch architecture for optical cable television and video surveillance networks. ISCAS (4) 2004: 221-224 | |
21 | EE | Lasse Harju, Jari Nurmi: A baseband receiver architecture for UMTS-WLAN interworking applications. ISCC 2004: 678-685 |
20 | EE | Christian Panis, Ulrich Hirnschrott, Andreas Krall, Gunther Laure, Wolfgang Lazian, Jari Nurmi: FSEL - Selective Predicated Execution for a Configurable DSP Core. ISVLSI 2004: 317-320 |
19 | David A. Sigüenza-Tortosa, Jari Nurmi: Packet scheduling in proteo network-on-chip. Parallel and Distributed Computing and Networks 2004: 116-121 | |
18 | EE | Christian Panis, Ulrich Hirnschrott, Gunther Laure, Wolfgang Lazian, Jari Nurmi: DSPxPlore: design space exploration methodology for an embedded DSP core. SAC 2004: 876-883 |
17 | EE | Tapani Ahonen, David A. Sigüenza-Tortosa, Hong Bin, Jari Nurmi: Topology optimization for application-specific networks-on-chip. SLIP 2004: 53-60 |
16 | Heikki Kariniemi, Jari Nurmi: Performance Evaluation and Implementation of Two Adaptive Routing Algorithms for XGFT Networks. Computers and Artificial Intelligence 23(5): (2004) | |
15 | EE | David A. Sigüenza-Tortosa, Tapani Ahonen, Jari Nurmi: Issues in the development of a practical NoC: the Proteo concept. Integration 38(1): 95-105 (2004) |
2003 | ||
14 | EE | Piia Simonen, Ilkka Saastamoinen, Jari Nurmi: Variable-Length Instruction Compression for Area Minimization. ASAP 2003: 155-160 |
13 | EE | Ilkka Saastamoinen, M. Alho, Jari Nurmi: Buffer implementation for Proteo network-on-chip. ISCAS (2) 2003: 113-116 |
12 | EE | Christian Panis, Raimund Leitner, Herbert Grünbacher, Jari Nurmi: xLIW - a scaleable long instruction word. ISCAS (5) 2003: 69-72 |
11 | EE | Tapani Ahonen, Tero Nurmi, Jari Nurmi, Jouni Isoaho: Block-wise Extraction of Rent's Exponents for an Extensible Processor. ISVLSI 2003: 193-202 |
10 | EE | Christian Panis, Raimund Leitner, Jari Nurmi: Scaleable Shadow Stack for a Configurable DSP Concept. IWSOC 2003: 222-227 |
9 | Christian Panis, Gunther Laure, Wolfgang Lazian, Herbert Grünbacher, Jari Nurmi: A Branch File for a Configurable DSP Core. VLSI 2003: 7-12 | |
8 | Tapio Ristimäki, Jari Nurmi: Reprogrammable Algorithm Accelerator IP Block. VLSI-SOC 2003: 228-232 | |
2002 | ||
7 | EE | Ilkka Saastamoinen, David A. Sigüenza-Tortosa, Jari Nurmi: Interconnect IP Node for Future System-on-Chip Designs. DELTA 2002: 116-122 |
6 | EE | Piia Simonen, Ilkka Saastamoinen, Mika Kuulusa, Jari Nurmi: Advanced Instruction Set Architectures for Reducing Program Memory Usage in a DSP Processor. DELTA 2002: 477-479 |
1997 | ||
5 | EE | Mika Kuulusa, Jari Nurmi, Janne Takala, Pasi Ojala, Henrik Herranen: A Flexible DSP Core for Embedded Systems. IEEE Design & Test of Computers 14(4): 60-68 (1997) |
1995 | ||
4 | Juhani Vehvilainen, Jari Nurmi: A Processor Core for 32 kbit/s G.726 ADPCM Codecs. ISCAS 1995: 1932-1935 | |
1994 | ||
3 | EE | Jari Toivanen, Jari Honkola, Jari Nurmi, Jyrki Tuominen: A VHDL-based bus model for multi-PCB system design. EURO-DAC 1994: 492-497 |
2 | Maini Williams, Jari Nurmi: Multipurpose Chip for Physiological Measurements. ISCAS 1994: 255-258 | |
1 | Jouni Isoaho, Jari Nurmi: An Overall FIR Filter Optimization Tool for High Granularity Implementation Technologies. ISCAS 1994: 265-268 |