Ajay K. Verma

2008
15	EE	Ajay K. Verma, Philip Brisk, Paolo Ienne: Fast, quasi-optimal, and pipelined instruction-set extensions. ASP-DAC 2008: 334-339
14	EE	Ajay K. Verma, Philip Brisk, Paolo Ienne: Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design. DATE 2008: 1250-1255
13	EE	Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne: Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. FPGA 2008: 181-190
12	EE	Ajay K. Verma, Philip Brisk, Paolo Ienne: Data-Flow Transformations to Maximize the Use of Carry-Save Representation in Arithmetic Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1761-1774 (2008)
2007
11	EE	Ajay K. Verma, Paolo Ienne: Improving XOR-Dominated Circuits by Exploiting Dependencies between Operands. ASP-DAC 2007: 601-608
10	EE	Ajay K. Verma, Philip Brisk, Paolo Ienne: Rethinking custom ISE identification: a new processor-agnostic method. CASES 2007: 125-134
9	EE	Philip Brisk, Ajay K. Verma, Paolo Ienne: An optimistic and conservative register assignment heuristic for chordal graphs. CASES 2007: 209-217
8	EE	Philip Brisk, Ajay K. Verma, Paolo Ienne, Hadi Parandeh-Afshar: Enhancing FPGA Performance for Arithmetic Circuits. DAC 2007: 334-337
7	EE	Ajay K. Verma, Philip Brisk, Paolo Ienne: Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits. DAC 2007: 404-409
6	EE	Ajay K. Verma, Paolo Ienne: Automatic synthesis of compressor trees: reevaluating large counters. DATE 2007: 443-448
5	EE	Philip Brisk, Ajay K. Verma, Paolo Ienne: Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design. ICCAD 2007: 172-179
2006
4	EE	Ajay K. Verma, Paolo Ienne: Towards the automatic exploration of arithmetic-circuit architectures. DAC 2006: 445-450
3	EE	Johann Großschädl, Paolo Ienne, Laura Pozzi, Stefan Tillich, Ajay K. Verma: Combining algorithm exploration with instruction set design: a case study in elliptic curve cryptography. DATE 2006: 218-223
2004
2	EE	Paolo Ienne, Ajay K. Verma: Arithmetic Transformations to Maximise the Use of Compressor Trees. DELTA 2004: 219-224
1	EE	Ajay K. Verma, Paolo Ienne: Improved use of the carry-save representation for the synthesis of complex arithmetic circuits. ICCAD 2004: 791-798

Coauthor Index

1	Panagiotis Athanasopoulos	[13]
2	Philip Brisk	[5] [7] [8] [9] [10] [12] [13] [14] [15]
3	Alessandro Cevrero	[13]
4	Johann Großschädl	[3]
5	Frank K. Gürkaynak	[13]
6	Paolo Ienne	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
7	Yusuf Leblebici	[13]
8	Hadi Parandeh-Afshar	[8] [13]
9	Laura Pozzi	[3]
10	Stefan Tillich	[3]