| 2009 |
|---|
| 9 | EE | Smita Krishnaswamy,
Stephen Plaza,
Igor L. Markov,
John P. Hayes:
Signature-Based SER Analysis and Design of Logic Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 74-86 (2009) |
| 2008 |
|---|
| 8 | EE | Stephen Plaza,
Igor L. Markov,
Valeria Bertacco:
Random Stimulus Generation using Entropy and XOR Constraints.
DATE 2008: 664-669 |
| 7 | EE | Stephen Plaza,
Igor L. Markov,
Valeria Bertacco:
Optimizing non-monotonic interconnect using functional simulation and logic restructuring.
ISPD 2008: 95-102 |
| 6 | EE | Stephen Plaza,
Igor L. Markov,
Valeria Bertacco:
Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2107-2119 (2008) |
| 2007 |
|---|
| 5 | EE | Stephen Plaza,
Kai-Hui Chang,
Igor L. Markov,
Valeria Bertacco:
Node Mergers in the Presence of Don't Cares.
ASP-DAC 2007: 414-419 |
| 4 | EE | Smita Krishnaswamy,
Stephen Plaza,
Igor L. Markov,
John P. Hayes:
Enhancing design robustness with reliability-aware resynthesis and logic simulation.
ICCAD 2007: 149-154 |
| 3 | EE | Kypros Constantinides,
Stephen Plaza,
Jason A. Blome,
Valeria Bertacco,
Scott A. Mahlke,
Todd M. Austin,
Bin Zhang,
Michael Orshansky:
Architecting a reliable CMP switch architecture.
TACO 4(1): (2007) |
| 2006 |
|---|
| 2 | EE | Kypros Constantinides,
Stephen Plaza,
Jason A. Blome,
Bin Zhang,
Valeria Bertacco,
Scott A. Mahlke,
Todd M. Austin,
Michael Orshansky:
BulletProof: a defect-tolerant CMP switch architecture.
HPCA 2006: 5-16 |
| 2005 |
|---|
| 1 | EE | Stephen Plaza,
Valeria Bertacco:
STACCATO: disjoint support decompositions from BDDs through symbolic kernels.
ASP-DAC 2005: 276-279 |
