| 2008 |
|---|
| 20 | EE | Eugenio Villar,
Axel Jantsch,
Christoph Grimm,
Tim Kogel:
Heterogeneous System-level Specification Using SystemC.
DATE 2008 |
| 19 | EE | Fernando Herrera,
Eugenio Villar,
Philipp A. Hartmann:
Specification of Adaptive HW/SW Systems in SystemC.
FDL 2008: 61-65 |
| 2007 |
|---|
| 18 | EE | Fernando Herrera,
Eugenio Villar,
Christoph Grimm,
Markus Damm,
Jan Haase:
A general approach to the interoperability of HetSC and SystemC-AMS.
FDL 2007: 32-37 |
| 17 | EE | Hector Posadas,
David Quijano,
Eugenio Villar,
Marcos Martínez:
Protocol Bus Modeling using inheritance with TLM2.0.
FDL 2007: 80-85 |
| 16 | EE | Andreas Herrholz,
Frank Oppenheimer,
Philipp A. Hartmann,
Andreas Schallenberg,
Wolfgang Nebel,
Christoph Grimm,
Markus Damm,
Jan Haase,
F. Brame,
Fernando Herrera,
Eugenio Villar,
Ingo Sander,
Axel Jantsch,
Anne-Marie Fouilliart,
M. Martinez:
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems.
FPL 2007: 396-401 |
| 15 | EE | Fernando Herrera,
Eugenio Villar:
A framework for heterogeneous specification and design of electronic embedded systems in SystemC.
ACM Trans. Design Autom. Electr. Syst. 12(3): (2007) |
| 2006 |
|---|
| 14 | EE | Hector Posadas,
Jesús Ádamez,
Pablo Sánchez,
Eugenio Villar,
Francisco Blasco:
POSIX modeling in SystemC.
ASP-DAC 2006: 485-490 |
| 13 | EE | Fernando Herrera,
Eugenio Villar:
A framework for embedded system specification under different models of computation in SystemC.
DAC 2006: 911-914 |
| 12 | EE | Fernando Herrera,
Eugenio Villar:
Extension of the SystemC Kernel for Simulation Coverage.
FDL 2006: 161-168 |
| 2005 |
|---|
| 11 | EE | Fernando Herrera,
Eugenio Villar:
Mixing Synchronous Reactive and Untimed Models of Computation.
FDL 2005: 315-329 |
| 2004 |
|---|
| 10 | EE | Hector Posadas,
Fernando Herrera,
Pablo Sánchez,
Eugenio Villar,
Francisco Blasco:
System-Level Performance Analysis in SystemC.
DATE 2004: 378-383 |
| 9 | EE | Fernando Herrera,
Pablo Sánchez,
Eugenio Villar:
Heterogeneous System-Level Specification in SystemC.
FDL 2004: 404-416 |
| 2003 |
|---|
| 8 | EE | Fernando Herrera,
Hector Posadas,
Pablo Sánchez,
Eugenio Villar:
Systemic Embedded Software Generation from SystemC.
DATE 2003: 10142-10149 |
| 7 | EE | Fernando Herrera,
Pablo Sánchez,
Eugenio Villar:
Modeling of CSP, KPN and SR Systems with SystemC.
FDL 2003: 572-583 |
| 2001 |
|---|
| 6 | EE | Daniel Gajski,
Eugenio Villar,
Wolfgang Rosenstiel,
Vassilios Gerousis,
D. Barton,
J. Plantin,
S. E. Ericsson,
Patrizia Cavalloro,
Gjalt G. de Jong:
C/C++: progress or deadlock in system-level specification.
DATE 2001: 136-137 |
| 2000 |
|---|
| 5 | EE | Giulio Gorla,
Eduard Moser,
Wolfgang Nebel,
Eugenio Villar:
System Specification Experiments on a Common Benchmark.
IEEE Design & Test of Computers 17(3): 22-32 (2000) |
| 1999 |
|---|
| 4 | EE | Adrian López,
Maite Veiga,
Eugenio Villar:
Hardware/Software Embedded System Specifiaction and Design Using Ada and VHDL.
Ada-Europe 1999: 356-370 |
| 1996 |
|---|
| 3 | | Masaharu Imai,
Eugenio Villar:
ASPDAC 1995: HDL synthesizability and interoperability.
IEEE Design & Test of Computers 13(1): 3-4 (1996) |
| 1995 |
|---|
| 2 | EE | Masaharu Imai,
Eugenio Villar:
Future direction of synthesizability and interoperability of HDL's: part 1.
ASP-DAC 1995 |
| 1 | EE | Eugenio Villar,
Masaharu Imai:
Future direction of synthesizabilty and interoperability of HDL's: part 2.
ASP-DAC 1995 |
