| 2008 |
|---|
| 8 | EE | Sean X. Shi,
Anand Ramalingam,
Daifeng Wang,
David Z. Pan:
Latch Modeling for Statistical Timing Analysis.
DATE 2008: 1136-1141 |
| 2007 |
|---|
| 7 | EE | Anand Ramalingam,
Ashish Kumar Singh,
Sani R. Nassif,
Michael Orshansky,
David Z. Pan:
Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis.
DAC 2007: 148-153 |
| 6 | EE | Anand Ramalingam,
Giri Devarayanadurg,
David Z. Pan:
Accurate power grid analysis with behavioral transistor network modeling.
ISPD 2007: 43-50 |
| 5 | EE | Anand Ramalingam,
Anirudh Devgan,
David Z. Pan:
Wakeup Scheduling in MTCMOS Circuits Using Successive Relaxation to Minimize Ground Bounce.
J. Low Power Electronics 3(1): 28-35 (2007) |
| 2006 |
|---|
| 4 | EE | Anand Ramalingam,
Sreekumar V. Kodakara,
Anirudh Devgan,
David Z. Pan:
Robust analytical gate delay modeling for low voltage circuits.
ASP-DAC 2006: 61-66 |
| 3 | EE | Anand Ramalingam,
Gi-Joon Nam,
Ashish Kumar Singh,
Michael Orshansky,
Sani R. Nassif,
David Z. Pan:
An accurate sparse matrix based framework for statistical static timing analysis.
ICCAD 2006: 231-236 |
| 2 | EE | Anand Ramalingam,
David Z. Pan,
Frank Liu,
Sani R. Nassif:
Accurate Thermal Analysis Considering Nonlinear Thermal Conductivity.
ISQED 2006: 644-649 |
| 2005 |
|---|
| 1 | EE | Anand Ramalingam,
Bin Zhang,
Anirudh Devgan,
David Z. Pan:
Sleep transistor sizing using timing criticality and temporal currents.
ASP-DAC 2005: 1094-1097 |
