Leonel Sousa

Leonel Augusto Sousa

2009
54	EE	Gabriel Falcão Paiva Fernandes, Leonel Sousa, Vítor Manuel Mendes da Silva, José Marinho: Parallel LDPC Decoding on the Cell/B.E. Processor. HiPEAC 2009: 389-403
53	EE	João Martins, Pedro Tomás, Leonel Sousa: Neural code metrics: Analysis and application to the assessment of neural models. Neurocomputing 72(10-12): 2337-2350 (2009)
2008
52		Pedro Tomás, João Martins, Leonel Sousa: Towards a Unified Model for the Retina - Static vs Dynamic Integrate and Fire Models. BIOSIGNALS (2) 2008: 528-533
51	EE	Svetislav Momcilovic, Leonel Sousa: A Parallel Algorithm for Advanced Video Motion Estimation on Multicore Architectures. CISIS 2008: 831-836
50	EE	Frederico Pratas, Georgi Gaydadjiev, Mladen Berekovic, Leonel Sousa, Stefanos Kaxiras: Low power microarchitecture with instruction reuse. Conf. Computing Frontiers 2008: 149-158
49	EE	Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis: Merged Computation for Whirlpool Hashing. DATE 2008: 272-275
48	EE	Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa: On-the-fly attestation of reconfigurable hardware. FPL 2008: 71-76
47	EE	Ricardo Chaves, Blagomir Donchev, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis: BRAM-LUT Tradeoff on a Polymorphic DES Design. HiPEAC 2008: 55-65
46	EE	Shinichi Yamagiwa, Leonel Sousa: Design and implementation of a tool for modeling and programming deadlock free meta-pipeline applications. IPDPS 2008: 1-8
45	EE	Aleksandar Ilic, Frederico Pratas, Leonel Sousa: Distributed Web-based Platform for Computer Architecture Simulation. ISPDC 2008: 317-324
44	EE	Shinichi Yamagiwa, Koichi Wada, Leonel Sousa: Heuristic Optimization Methods for Improving Performance of Recursive General Purpose Applications on GPUs. ISPDC 2008: 325-332
43	EE	Gabriel Falcão Paiva Fernandes, Vítor Manuel Mendes da Silva, Marco Alexandre Cravo Gomes, Leonel Augusto Sousa: Edge Stream Oriented LDPC Decoding. PDP 2008: 237-244
42	EE	Gabriel Falcão Paiva Fernandes, Leonel Sousa, Vítor Manuel Mendes da Silva: Massive parallel LDPC decoding on GPU. PPOPP 2008: 83-90
41	EE	Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis: Cost-Efficient SHA Hardware Accelerators. IEEE Trans. VLSI Syst. 16(8): 999-1008 (2008)
2007
40	EE	Shinichi Yamagiwa, Leonel Sousa: Design and implementation of a stream-based distributedcomputing platform using graphics processing units. Conf. Computing Frontiers 2007: 197-204
39	EE	Shinichi Yamagiwa, Leonel Sousa, Diogo Antão: Data buffering optimization methods toward a uniform programming interface for gpu-based applications. Conf. Computing Frontiers 2007: 205-212
38	EE	Miguel Ribeiro, Leonel Sousa: A Run-time Reconfigurable Processor for Video Motion Estimation. FPL 2007: 726-729
37	EE	Sérgio F. Martins, Leonel Sousa, João Martins: Additive Logistic Regression Applied to Retina Modelling. ICIP (3) 2007: 309-312
36	EE	Leonel Sousa: Efficient Method for Magnitude Comparison in RNS Based on Two Pairs of Conjugate Moduli. IEEE Symposium on Computer Arithmetic 2007: 240-250
35	EE	Leonel Sousa, Moisés Simões Piedade, J. Germano, Teresa Mendes de Almeida, Paulo Alexandre Crisóstomo Lopes, Filipe Cardoso, Paulo Freitas: Generic Architecture Designed for Biomedical Embedded Systems. IESS 2007: 353-362
34	EE	Paulo Alexandre Crisóstomo Lopes, J. Germano, T. M. Almeida, Leonel Sousa, Moisés Simões Piedade, Filipe Cardoso, H. A. Ferreira, P. P. Freitas: A New Handheld Biochip-based Microsystem. ISCAS 2007: 2379-2382
33	EE	Shinichi Yamagiwa, Leonel Sousa, Tomás Brandão: Meta-Pipeline: A New Execution Mechanism for Distributed Pipeline Processing. ISPDC 2007: 17-24
32	EE	Shinichi Yamagiwa, Leonel Sousa: Caravela: A Novel Stream-Based Distributed Computing Environment. IEEE Computer 40(5): 70-77 (2007)
2006
31	EE	Rodrigo Piedade, Leonel Sousa: Configurable Embedded Core for Controlling Electro-Mechanical Systems. ARC 2006: 18-23
30	EE	Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis: Improving SHA-2 Hardware Implementations. CHES 2006: 298-310
29	EE	Svetislav Momcilovic, Tiago Dias, Nuno Roma, Leonel Sousa: Application Specific Instruction Set Processor for Adaptive Video Motion Estimation. DSD 2006: 160-167
28	EE	Ricardo Chaves, Georgi Kuzmanov, Stamatis Vassiliadis, Leonel Sousa: Reconfigurable memory based AES co-processor. IPDPS 2006
27	EE	Tiago Dias, Nuno Roma, Leonel Sousa: Low Power Distance Measurement Unit for Real-Time Hardware Motion Estimators. PATMOS 2006: 247-255
26	EE	Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis: Rescheduling for Optimized SHA-1 Calculation. SAMOS 2006: 425-434
25	EE	Oliver Sinnen, Leonel Augusto Sousa, Frode Eika Sandnes: Toward a Realistic Task Scheduling Model. IEEE Trans. Parallel Distrib. Syst. 17(3): 263-275 (2006)
24	EE	Shinichi Yamagiwa, Leonel Sousa, Kevin Ferreira, Keiichi Aoki, Masaaki Ono, Koichi Wada: Maestro2: Experimental Evaluation of Communication Performance Improvement Techniques in the Link Layer. Journal of Interconnection Networks 7(2): 295-318 (2006)
2005
23	EE	Stamatis Vassiliadis, Leonel Sousa, Georgi Gaydadjiev: The Midlifekicker Microarchitecture Evaluation Metric. ASAP 2005: 92-100
22	EE	Ricardo Guapo, Leonel Sousa, Shinichi Yamagiwa: On the Implementation and Evaluation of Berkeley Sockets on Maestro2 cluster computing environment. ISPDC 2005: 317-324
21	EE	Oliver Sinnen, Leonel Sousa: Communication Contention in Task Scheduling. IEEE Trans. Parallel Distrib. Syst. 16(6): 503-515 (2005)
2004
20	EE	Ricardo Chaves, Leonel Sousa: {2n+1, sn+k, sn-1}: A New RNS Moduli Set Extension. DSD 2004: 210-217
19	EE	Oliver Sinnen, Leonel Sousa: Task Scheduling: Considering the Processor Involvement in Communication. ISPDC/HeteroPar 2004: 328-335
18	EE	Kevin Ferreira, Shinichi Yamagiwa, Leonel Sousa, Keiichi Aoki, Koichi Wada, Luis Miguel Campos: Distributed Shared Memory System Based on the Maestro2 High Performance Cluster Network. ISPDC/HeteroPar 2004: 91-96
17	EE	Michel Leong, Pedro Vasconcelos, Jorge R. Fernandes, Leonel Sousa: A programmable cellular neural network circuit. SBCCI 2004: 186-191
16	EE	Oliver Sinnen, Leonel Sousa: List scheduling: extension for contention awareness and evaluation of node priorities for heterogeneous cluster architectures. Parallel Computing 30(1): 81-101 (2004)
15	EE	Oliver Sinnen, Leonel Sousa: On Task Scheduling Accuracy: Evaluation Methodology and Results. The Journal of Supercomputing 27(2): 177-194 (2004)
2003
14	EE	Ricardo Chaves, Leonel Sousa: RDSP: A RISC DSP based on Residue Number System. DSD 2003: 128-137
13	EE	Leonel Sousa, Pedro Tomás, Francisco J. Pelayo, Antonio Martínez, Christian A. Morillas, Samuel F. Romero: An FPL Bioinspired Visual Encoding System to Stimulate Cortical Neurons in Real-Time. FPL 2003: 691-700
12	EE	Nuno Roma, Tiago Dias, Leonel Sousa: Customisable Core-Based Architectures for Real-Time Motion Estimation on FPGAs. FPL 2003: 745-754
11	EE	Nuno Roma, Leonel Sousa: Automatic Synthesis of Motion Estimation Processors Based on a New Class of Hardware Architectures. VLSI Signal Processing 34(3): 277-290 (2003)
2002
10		Nuno Roma, Leonel Sousa: Efficient and configurable full-search block-matching processors. IEEE Trans. Circuits Syst. Video Techn. 12(12): 1160- (2002)
2001
9	EE	Oliver Sinnen, Leonel Sousa: Exploiting Unused Time Slots in List Scheduling Considering Communication Contention. Euro-Par 2001: 166-170
8	EE	Oliver Sinnen, Leonel Sousa: Scheduling Task Graphs on Arbitrary Processor Architectures Considering Contention. HPCN Europe 2001: 373-382
7	EE	Oliver Sinnen, Leonel Sousa: Comparison of Contention Aware List Scheduling Heuristics for Cluster Computing. ICPP Workshops 2001: 382-390
6		Nuno Roma, Leonel Sousa: A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation. VLSI-SOC 2001: 253-264
2000
5	EE	Nuno Roma, Leonel Sousa: In the Development and Evaluation of Specialized Processors for Computing High-Order 2-D Image Moments in Real-Time. CAMP 2000: 170
4	EE	Oliver Sinnen, Leonel Sousa: A Platform Independent Parallelising Tool Based on Graph Theoretic Models. VECPAR 2000: 154-167
3	EE	Leonel Sousa, Oliver Sinnen: Synchronous Non-local Image Processing on Orthogonal Multiprocessor Systems. VECPAR 2000: 453-466
1999
2		Jorge Isidro, Luís Coelho, Kevin Ferreira, Leonel Sousa: On the Development of a Video CODEC for Low Bitrate Communication in General Purpose Computers. Applied Informatics 1999: 285-288
1		Leonel Augusto Sousa: Applying Conditional Processing to Design Low-Power Array Processors for Motion Estimation. ICIP (2) 1999: 769-773

Coauthor Index

1	T. M. Almeida	[34]
2	Teresa Mendes de Almeida	[35]
3	Diogo Antão	[39]
4	Keiichi Aoki	[18] [24]
5	Mladen Berekovic	[50]
6	Tomás Brandão	[33]
7	Luis Miguel Campos	[18]
8	Filipe Cardoso	[34] [35]
9	Ricardo Chaves	[14] [20] [26] [28] [30] [41] [47] [48] [49]
10	Luís Coelho	[2]
11	Tiago Dias	[12] [27] [29]
12	Blagomir Donchev	[47]
13	Gabriel Falcão Paiva Fernandes	[42] [43] [54]
14	Jorge R. Fernandes	[17]
15	H. A. Ferreira	[34]
16	Kevin Ferreira	[2] [18] [24]
17	P. P. Freitas	[34]
18	Paulo Freitas	[35]
19	Georgi Gaydadjiev (G. N. Gaydadjiev)	[23] [50]
20	J. Germano	[34] [35]
21	Marco Alexandre Cravo Gomes	[43]
22	Ricardo Guapo	[22]
23	Aleksandar Ilic	[45]
24	Jorge Isidro	[2]
25	Stefanos Kaxiras	[50]
26	Georgi Kuzmanov	[26] [28] [30] [41] [47] [48] [49]
27	Michel Leong	[17]
28	Paulo Alexandre Crisóstomo Lopes	[34] [35]
29	José Marinho	[54]
30	Antonio Martínez	[13]
31	João Martins	[37] [52] [53]
32	Sérgio F. Martins	[37]
33	Svetislav Momcilovic	[29] [51]
34	Christian A. Morillas	[13]
35	Masaaki Ono	[24]
36	Francisco J. Pelayo	[13]
37	Moisés Simões Piedade	[34] [35]
38	Rodrigo Piedade	[31]
39	Frederico Pratas	[45] [50]
40	Miguel Ribeiro	[38]
41	Nuno Roma	[5] [6] [10] [11] [12] [27] [29]
42	Samuel F. Romero	[13]
43	Frode Eika Sandnes	[25]
44	Vítor Manuel Mendes da Silva	[42] [43] [54]
45	Oliver Sinnen	[3] [4] [7] [8] [9] [15] [16] [19] [21] [25]
46	Pedro Tomás	[13] [52] [53]
47	Pedro Vasconcelos	[17]
48	Stamatis Vassiliadis	[23] [26] [28] [30] [41] [47] [49]
49	Koichi Wada	[18] [24] [44]
50	Shinichi Yamagiwa	[18] [22] [24] [32] [33] [39] [40] [44] [46]

Colors in the list of coauthors