2009 |
38 | EE | Marco D. Santambrogio,
Massimo Redaelli,
Marco Maggioni:
Task graph scheduling for reconfigurable architectures driven by reconfigurations hiding and resources reuse.
ACM Great Lakes Symposium on VLSI 2009: 21-26 |
37 | EE | Dario Cozzi,
Claudia Farè,
Alessandro Meroni,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices.
ACM Great Lakes Symposium on VLSI 2009: 421-424 |
2008 |
36 | EE | Carlo Curino,
Luca Fossati,
Vincenzo Rana,
Francesco Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
The Shining embedded system design methodology based on self dynamic reconfigurable architectures.
ASP-DAC 2008: 595-600 |
35 | EE | Ivano Bonesana,
Marco Paolieri,
Marco D. Santambrogio:
An adaptable FPGA-based System for Regular Expression Matching.
DATE 2008: 1262-1267 |
34 | EE | Francesco Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
Task Scheduling with Configuration Prefetching and Anti-Fragmentation techniques on Dynamically Reconfigurable Systems.
DATE 2008: 519-522 |
33 | EE | Andrea Cuoccio,
Paolo R. Grassi,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
A Generation Flow for Self-Reconfiguration Controllers Customization.
DELTA 2008: 279-284 |
32 | EE | Alessandro Meroni,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
A Requirements-Driven Reconfigurable SoC Communication Infrastructure Design Flow.
DELTA 2008: 405-409 |
31 | EE | Alessio Montone,
Marco D. Santambrogio,
Donatella Sciuto:
A Design Workflow for the Identification of Area Constraints in Dynamic Reconfigurable Systems.
DELTA 2008: 450-453 |
30 | EE | Alessandro Meroni,
Vincenzo Rana,
Marco D. Santambrogio,
Francesco Bruschi:
A Requirements-Driven Simulation Framework for Communication Infrastructures Design.
FDL 2008: 111-117 |
29 | EE | Marco D. Santambrogio,
Vincenzo Rana,
Donatella Sciuto:
Operating system support for online partial dynamic reconfiguration management.
FPL 2008: 455-458 |
28 | EE | Fabio Cancare,
Marco D. Santambrogio,
Donatella Sciuto:
A design flow tailored for self dynamic reconfigurable architecture.
IPDPS 2008: 1-8 |
27 | EE | Marco D. Santambrogio,
Donatella Sciuto:
Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign.
IPDPS 2008: 1-8 |
26 | EE | Alessio Montone,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
HARPE: A Harvard-based processing element tailored for partial dynamic reconfigurable architectures.
IPDPS 2008: 1-8 |
25 | EE | Massimo Morandi,
Marco Novati,
Marco D. Santambrogio,
Donatella Sciuto:
Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture.
ISVLSI 2008: 286-291 |
2007 |
24 | EE | Cristiana Bolchini,
Davide Quarta,
Marco D. Santambrogio:
SEU mitigation for sram-based fpgas through dynamic partial reconfiguration.
ACM Great Lakes Symposium on VLSI 2007: 55-60 |
23 | EE | Cristiana Bolchini,
Antonio Miele,
Marco D. Santambrogio:
TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs.
DFT 2007: 87-95 |
22 | | Cristiana Bolchini,
Fabio Salice,
Marco D. Santambrogio:
Exploring Partial Reconfiguration for Mitigating SEU faults in SRAM-Based FPGAs.
ERSA 2007: 199-202 |
21 | | Anna Antola,
Marco Castagna,
Pamela Gotti,
Marco D. Santambrogio:
Evolvable Hardware: A Functional Level Evolution Framework Based on ImpulseC.
ERSA 2007: 216-219 |
20 | | Matteo Giani,
Massimo Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
Task Partitioning for the Scheduling on Reconfigurable Systems driven by Specification Self-Similarity.
ERSA 2007: 78-84 |
19 | EE | Marco D. Santambrogio,
Seda Ogrenci Memik,
Vincenzo Rana,
Umut A. Acar,
Donatella Sciuto:
A novel SoC design methodology combining adaptive software and reconfigurable hardware.
ICCAD 2007: 303-308 |
18 | EE | Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto,
Boris Kettelhoit,
Markus Köster,
Mario Porrmann,
Ulrich Rückert:
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux.
IPDPS 2007: 1-8 |
17 | EE | Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
Dynamic Reconfigurability in Embedded System Design.
ISCAS 2007: 2734-2737 |
16 | EE | S. Corbetta,
Fabrizio Ferrandi,
Massimo Morandi,
Marco Novati,
Marco D. Santambrogio,
Donatella Sciuto:
Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System.
ISVLSI 2007: 457-458 |
15 | EE | Vincenzo Rana,
Chiara Sandionigi,
Marco D. Santambrogio,
Donatella Sciuto:
An adaptive genetic algorithm for dynamically reconfigurable modules allocation.
VLSI-SoC 2007: 128-133 |
14 | EE | Marco Paolieri,
Ivano Bonesana,
Marco D. Santambrogio:
ReCPU: A parallel and pipelined architecture for regular expression matching.
VLSI-SoC 2007: 19-24 |
2006 |
13 | EE | Roberto Cordone,
Fabrizio Ferrandi,
Marco D. Santambrogio,
Gianluca Palermo,
Donatella Sciuto:
Using speculative computation and parallelizing techniques to improve scheduling of control based designs.
ASP-DAC 2006: 898-904 |
12 | | Giovanni Agosta,
Francesco Bruschi,
Marco D. Santambrogio,
Donatella Sciuto:
Synthesis of Object Oriented Models on Reconfigurable Hardware.
ERSA 2006: 249-250 |
11 | | Carlo Amicucci,
Fabrizio Ferrandi,
Marco D. Santambrogio,
Donatella Sciuto:
SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture.
ERSA 2006: 63-69 |
10 | EE | Giovanni Agosta,
Marco D. Santambrogio,
Seda Ogrenci Memik:
Adaptive Metrics for System-Level Functional Partitioning.
FDL 2006: 153-155 |
9 | EE | Marco D. Santambrogio,
Donatella Sciuto:
Partial Dynamic Reconfiguration: The Caronte Approach. A New Degree of Freedom in the HW/SW Codesign.
FPL 2006: 1-2 |
8 | EE | Simone Borgio,
Davide Bosisio,
Fabrizio Ferrandi,
Matteo Monchiero,
Marco D. Santambrogio,
Donatella Sciuto,
Antonino Tumeo:
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA.
ICSAMOS 2006: 107-114 |
7 | EE | Fabrizio Ferrandi,
G. Ferrara,
R. Palazzo,
Vincenzo Rana,
Marco D. Santambrogio:
VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow.
IPDPS 2006 |
6 | EE | Marco Giorgetta,
Marco D. Santambrogio,
Donatella Sciuto,
Paola Spoletini:
A graph-coloring approach to the allocation and tasks scheduling for reconfigurable architectures.
VLSI-SoC 2006: 24-29 |
5 | EE | Matteo Murgida,
Alessandro Panella,
Vincenzo Rana,
Marco D. Santambrogio,
Donatella Sciuto:
Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow.
VLSI-SoC 2006: 74-79 |
2005 |
4 | EE | Giovanni Agosta,
Francesco Bruschi,
Marco D. Santambrogio,
Donatella Sciuto:
A Data Oriented Approach to the Design of Reconfigurable Stream Decoders.
ESTImedia 2005: 107-112 |
3 | EE | Alberto Donato,
Fabrizio Ferrandi,
Massimo Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
Caronte: A Complete Methodology for the Implementation of Partially Dynamically Self-Reconfiguring Systems on FPGA Platforms.
FCCM 2005: 321-322 |
2 | EE | Fabrizio Ferrandi,
Marco D. Santambrogio,
Donatella Sciuto:
A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture.
IPDPS 2005 |
1 | EE | Alberto Donato,
Fabrizio Ferrandi,
Massimo Redaelli,
Marco D. Santambrogio,
Donatella Sciuto:
Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms.
VLSI-SoC 2005: 87-109 |