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Mitchell A. Thornton

Mitchell Aaron Thornton

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2009
49EEAlex Fit-Florea, Lun Li, Mitchell A. Thornton, David W. Matula: A Discrete Logarithm Number System for Integer Arithmetic Modulo 2k: Algorithms and Lookup Structures. IEEE Trans. Computers 58(2): 163-174 (2009)
2008
48EEDavid Y. Feinstein, Mitchell A. Thornton, D. Michael Miller: Partially Redundant Logic Detection Using Symbolic Equivalence Checking in Reversible and Irreversible Logic Circuits. DATE 2008: 1378-1381
47EEDavid Y. Feinstein, Mitchell A. Thornton, D. Michael Miller: On the Data Structure Metrics of Quantum Multiple-Valued Decision Diagrams. ISMVL 2008: 138-143
46EEMitchell A. Thornton, David W. Matula, Laura Spenner, D. Michael Miller: Quantum Logic Implementation of Unary Arithmetic Operations. ISMVL 2008: 202-207
45EEChad M. Lawler, Michael A. Harper, Stephen A. Szygenda, Mitchell A. Thornton: Components of disaster-tolerant computing: analysis of disaster recovery, IT application downtime and executive visibility. IJBIS 3(3): 317-331 (2008)
2007
44EELun Li, Frank P. Coyle, Mitchell A. Thornton: Automatic High Level Assertion Generation and Synthesis for Embedded System Design. FDL 2007: 261-267
43EEDavid Y. Feinstein, V. S. S. Nair, Mitchell A. Thornton: Advances in Quantum Computing Fault Tolerance and Testing. HASE 2007: 369-370
42EEChad M. Lawler, Michael A. Harper, Mitchell A. Thornton: Components and Analysis of Disaster Tolerant Computing. IPCCC 2007: 380-386
41EED. Michael Miller, David Y. Feinstein, Mitchell A. Thornton: Variable Reordering and Sifting for QMDD. ISMVL 2007: 10
40EEMahsan Amoui, Daniel Große, Mitchell A. Thornton, Rolf Drechsler: Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL. ISMVL 2007: 50
2006
39EELun Li, Mitchell A. Thornton, David W. Matula: A digit serial algorithm for the integer power operation. ACM Great Lakes Symposium on VLSI 2006: 302-307
38EELun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula: Performance Evaluation of a Novel Direct Table Lookup Method and Architecture with Application to 16-bit Integer Functions. ASAP 2006: 99-104
37EED. Michael Miller, Mitchell A. Thornton: QMDD: A Decision Diagram Structure for Reversible and Quantum Circuits. ISMVL 2006: 30
36EELun Li, Mitchell A. Thornton, Marek A. Perkowski: A Quantum CAD Accelerator Based on Grover's Algorithm for Finding the Minimum Fixed Polarity Reed-Muller Form. ISMVL 2006: 33
2005
35EEDavid W. Matula, Alex Fit-Florea, Mitchell Aaron Thornton: Table Lookup Structures for Multiplicative Inverses Modulo 2k. IEEE Symposium on Computer Arithmetic 2005: 156-163
34EEMitchell A. Thornton: The Karhunen-Loève Transform of Discrete MVL Functions. ISMVL 2005: 194-199
33EELun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula: Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2k. ISVLSI 2005: 130-135
32EEFrank P. Coyle, Mitchell A. Thornton: A Framework and Process for Curricular Integration and Innovation Using Project Based Interdisciplinary Teams. ITCC (1) 2005: 432-435
31EERobert B. Reese, Mitchell A. Thornton, Cherrice Traver: A Coarse-Grain Phased Logic CPU. IEEE Trans. Computers 54(7): 788-799 (2005)
30EERobert B. Reese, Mitchell A. Thornton, Cherrice Traver, David Hemmendinger: Early evaluation for performance enhancement in phased logic. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 532-550 (2005)
2004
29EEKenneth Fazel, Lun Li, Mitchell A. Thornton, Robert B. Reese, Cherrice Traver: Performance enhancement in phased logic circuits using automatic slack-matching buffer insertion. ACM Great Lakes Symposium on VLSI 2004: 413-416
28 Ralph Marczynski, Mitchell A. Thornton, Stephen A. Szygenda: Test vector generation and classification using FSM traversals. ISCAS (5) 2004: 309-312
27EELun Li, Mitchell A. Thornton, Stephen A. Szygenda: A Genetic Approach for Conjunction Scheduling in Symbolic Equivalence Checking. ISVLSI 2004: 32-38
2003
26EERobert B. Reese, Mitchell A. Thornton, Cherrice Traver: A Coarse-Grain Phased Logic CPU. ASYNC 2003: 2-13
25EEKenneth Fazel, Mitchell A. Thornton, Robert B. Reese: PLFire: A Visualization Tool for Asynchronous Phased Logic Designs. DATE 2003: 11096-11097
24EEMitchell A. Thornton: Spectral Transforms of Mixed-radix MVL Functions. ISMVL 2003: 329-333
23EERobert B. Reese, Mitchell A. Thornton, Cherrice Traver: A Fine-Grain Phased Logic CPU. ISVLSI 2003: 70-79
22EEMitchell A. Thornton: Performance Evaluation of a Parallel Decoupled Data Driven Multiprocessor. Parallel Processing Letters 13(3): 497-507 (2003)
2002
21EEWhitney J. Townsend, Mitchell A. Thornton, Rolf Drechsler, D. Michael Miller: Computing walsh, arithmetic, and reed-muller spectral decision diagrams using graph transformations. ACM Great Lakes Symposium on VLSI 2002: 178-183
20EEMitchell A. Thornton, Kenneth Fazel, Robert B. Reese, Cherrice Traver: Generalized Early Evaluation in Self-Timed Circuits. DATE 2002: 255-259
19EEMikael Kerttu, Per Lindgren, Mitchell A. Thornton, Rolf Drechsler: Switching activity estimation of finite state machines for low power synthesis. ISCAS (4) 2002: 65-68
18EEMitchell A. Thornton, D. Michael Miller, Whitney J. Townsend: Chrestenson Spectrum Computation Using Cayley Color Graphs. ISMVL 2002: 123-129
17EEMitchell A. Thornton, Rolf Drechsler, D. Michael Miller: Multi-Output Timed Shannon Circuits. ISVLSI 2002: 47-52
16EEJ. W. Bruce, Mitchell A. Thornton, L. Shivakumaraiah, P. S. Kokate, X. Li: Efficient Adder Circuits Based on a Conservative Reversible Logic Gate. ISVLSI 2002: 83-88
15 Mikael Kerttu, Per Lindgren, Rolf Drechsler, Mitchell A. Thornton: Low Power Optimization Techniques for BDD Mapped Finite State Machines. IWLS 2002: 143-148
14 Whitney J. Townsend, Mitchell A. Thornton, Parag K. Lala: On-line Error Detection in a Carry-free Adder. IWLS 2002: 251-254
2001
13EEPer Lindgren, Mikael Kerttu, Mitchell A. Thornton, Rolf Drechsler: Low power optimization technique for BDD mapped circuits. ASP-DAC 2001: 615-621
12EEMitchell A. Thornton, Rolf Drechsler: Spectral decision diagrams using graph transformations. DATE 2001: 713-719
11 Robert B. Reese, Mitchell A. Thornton, Cherrice Traver: Arithmetic Logic Circuits Using Self-Timed Bit Level Dataflow and Early Evaluation. ICCD 2001: 18-23
2000
10EERolf Drechsler, Mitchell A. Thornton, David Wessels: MDD-Based Synthesis of Multi-Valued Logic Networks. ISMVL 2000: 41-46
9EEMitchell A. Thornton, Rolf Drechsler, Wolfgang Günther: A Method for Approximate Equivalence Checking. ISMVL 2000: 447-452
8EERolf Drechsler, Mitchell A. Thornton: Computation of Spectral Information from Logic Netlists. ISMVL 2000: 53-58
7EEQ. G. Samdani, Mitchell A. Thornton: Cache Resident Data Locality Analysis. MASCOTS 2000: 539-
6EEA. Zuzek, Rolf Drechsler, Mitchell A. Thornton: Boolean function representation and spectral characterization using AND/OR graphs. Integration 29(2): 101-116 (2000)
1999
5EEMitchell A. Thornton, J. P. Williams, Rolf Drechsler, Nicole Drechsler: Variable Reordering for Shared Binary Decision Diagrams Using Output Probabilities. DATE 1999: 758-759
4EEMitchell A. Thornton, V. S. S. Nair: Behavioral synthesis of combinational logic using spectral-based heuristics. ACM Trans. Design Autom. Electr. Syst. 4(2): 219-230 (1999)
1997
3EEMitchell A. Thornton, D. L. Andrews: Graph Analysis and Transformation Techniques for Runtime Minimization in Multi-Threaded Architectures. HICSS (1) 1997: 566-575
2 Mitchell A. Thornton: Signed Binary Addition Circuitry with Inherent Even Parity Outputs. IEEE Trans. Computers 46(7): 811-816 (1997)
1995
1EEMitchell A. Thornton, V. S. S. Nair: Efficient calculation of spectral coefficients and their applications. IEEE Trans. on CAD of Integrated Circuits and Systems 14(11): 1328-1341 (1995)

Coauthor Index

1Mahsan Amoui [40]
2D. L. Andrews [3]
3J. W. Bruce [16]
4Frank P. Coyle [32] [44]
5Nicole Drechsler [5]
6Rolf Drechsler [5] [6] [8] [9] [10] [12] [13] [15] [17] [19] [21] [40]
7Kenneth Fazel [20] [25] [29]
8David Y. Feinstein [41] [43] [47] [48]
9Alex Fit-Florea [33] [35] [38] [49]
10Daniel Große [40]
11Wolfgang Günther [9]
12Michael A. Harper [42] [45]
13David Hemmendinger [30]
14Mikael Kerttu [13] [15] [19]
15P. S. Kokate [16]
16Parag K. Lala [14]
17Chad M. Lawler [42] [45]
18Lun Li [27] [29] [33] [36] [38] [39] [44] [49]
19X. Li [16]
20Per Lindgren [13] [15] [19]
21Ralph Marczynski [28]
22David W. Matula [33] [35] [38] [39] [46] [49]
23D. Michael Miller [17] [18] [21] [37] [41] [46] [47] [48]
24V. S. S. Nair [1] [4] [43]
25Marek A. Perkowski [36]
26Robert B. Reese [11] [20] [23] [25] [26] [29] [30] [31]
27Q. G. Samdani [7]
28L. Shivakumaraiah [16]
29Laura Spenner [46]
30Stephen A. Szygenda [27] [28] [45]
31Whitney J. Townsend [14] [18] [21]
32Cherrice Traver [11] [20] [23] [26] [29] [30] [31]
33David Wessels [10]
34J. P. Williams [5]
35A. Zuzek [6]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)