| 2008 |
|---|
| 16 | EE | Martin Radetzki,
Rauf Salimi Khaligh:
Accuracy-Adaptive Simulation of Transaction Level Models.
DATE 2008: 788-791 |
| 15 | EE | Rauf Salimi Khaligh,
Martin Radetzki:
A Latency, Preemption and Data Transfer Accurate Adaptive Transaction Level Model for Efficient Simulation of Pipelined Buses.
FDL 2008: 37-42 |
| 14 | EE | Weining Hao,
Martin Radetzki:
A data traffic efficient H.264 deblocking IP.
ISCAS 2008: 3430-3433 |
| 2007 |
|---|
| 13 | EE | Martin Radetzki,
Rauf Salimi Khaligh:
Modelling Alternatives for Cycle Approximate Bus TLMs.
FDL 2007: 74-79 |
| 12 | EE | Rauf Salimi Khaligh,
Martin Radetzki:
Efficient and Extensible Transaction Level Modeling Based on an Object Oriented Model of Bus Transactions.
IESS 2007: 313-324 |
| 2006 |
|---|
| 11 | EE | Martin Radetzki:
SystemC TLM Transaction Modelling and Dispatch for Active Object.
FDL 2006: 203-209 |
| 2004 |
|---|
| 10 | EE | Andreas Vörg,
Martin Radetzki,
Wolfgang Rosenstiel:
Measurement of IP Qualification Costs and Benefits.
DATE 2004: 996-1001 |
| 9 | EE | Hans-Jürgen Brand,
Steffen Rülke,
Martin Radetzki:
IPQ: IP Qualification for Efficient System Design.
ISQED 2004: 478-482 |
| 8 | EE | Martin Schaaf,
Andrea Freßmann,
Rainer Maximini,
Ralph Bergmann,
Alexander Tartakovski,
Martin Radetzki:
Intelligent IP retrieval driven by application requirements.
Integration 37(4): 253-287 (2004) |
| 2003 |
|---|
| 7 | EE | U. Badelt,
H. Kühl,
Martin Radetzki:
sciPROVE: C++ Based Verification Environment for IP and SoC Design1.
FDL 2003: 617-627 |
| 2002 |
|---|
| 6 | EE | Ralf Seepold,
Natividad Martínez Madrid,
Andreas Vörg,
Wolfgang Rosenstiel,
Martin Radetzki,
P. Neumann,
J. Haase:
A Qualification Platform for Design Reuse.
ISQED 2002: 75-80 |
| 1999 |
|---|
| 5 | EE | Martin Radetzki,
Ansgar Stammermann,
Wolfram Putzke-Röming,
Wolfgang Nebel:
Data Type Analysis for Hardware Synthesis from Object-Oriented Models.
DATE 1999: 491- |
| 1998 |
|---|
| 4 | | Alberto Allara,
Massimo Bombana,
Patrizia Cavalloro,
Wolfgang Nebel,
Wolfram Putzke-Röming,
Martin Radetzki:
ATM Cell Modelling using Objective VHDL.
ASP-DAC 1998: 261-264 |
| 3 | EE | Wolfram Putzke-Röming,
Martin Radetzki,
Wolfgang Nebel:
A Flexible Message Passing Mechanism for Objective VHDL.
DATE 1998: 242-249 |
| 2 | EE | Martin Radetzki,
Wolfram Putzke-Röming,
Wolfgang Nebel:
A Unified Approach to Object-Oriented VHDL.
J. Inf. Sci. Eng. 14(3): 523-545 (1998) |
| 1996 |
|---|
| 1 | | Guido Schumacher,
Bernhard Josko,
Gerhard Wagner,
Martin Radetzki:
Development of a Telephone Answering Machine in a Lab - FPGAs in Education.
FPL 1996: 400-404 |
