Steffen Rülke

2008
17	EE	Frank Rogin, Thomas Klotz, Görschwin Fey, Rolf Drechsler, Steffen Rülke: Automatic Generation of Complex Properties for Hardware Designs. DATE 2008: 545-548
16	EE	Maik Boden, Thomas Fiebig, Markus Reiband, Peter Reichel, Steffen Rülke: GePaRD - A High-Level Generation Flow for Partially Reconfigurable Designs. ISVLSI 2008: 298-303
2007
15	EE	Rene Beckert, Thomas Fuchs, Steffen Rülke, Wolfram Hardt: A Run-Time Scheduling Framework for a Reconfigurable Hardware Emulator. DSD 2007: 147-150
14	EE	Frank Rogin, Christian Genz, Rolf Drechsler, Steffen Rülke: An Integrated SystemC Debugging Environment. FDL 2007: 140-145
13	EE	Rene Beckert, Thomas Fuchs, Steffen Rülke, Wolfram Hardt: A Tailored Design Partitioning Method for Hardware Emulation. IEEE International Workshop on Rapid System Prototyping 2007: 99-105
12	EE	Maik Boden, Thomas Fiebig, Torsten Meibner, Steffen Rülke, Jürgen Becker: High-Level Synthesis of HW Tasks Targeting Run-Time Reconfigurable FPGAs. IPDPS 2007: 1-8
2006
11	EE	Frank Rogin, Erhard Fehlauer, Steffen Rülke, Sebastian Ohnewald, Thomas Berndt: Non-Intrusive High-level SystemC Debugging. FDL 2006: 155-161
10	EE	Maik Boden, Steffen Rülke, Jürgen Becker: A high-level target-precise model for designing reconfigurable HW tasks. IPDPS 2006
2005
9	EE	Maik Boden, Alex Gleich, Steffen Rülke, Ulrich Nageldinger: A Low-Cost Realization of an Adaptable Protocol Processing Unit. IPDPS 2005
2004
8	EE	Maik Boden, Manfred Koegst, José Luis Tiburcio Badía, Steffen Rülke: Cost-Efficient Implementation of Adaptive Finite State Machines. DSD 2004: 144-151
7	EE	Hans-Jürgen Brand, Steffen Rülke, Martin Radetzki: IPQ: IP Qualification for Efficient System Design. ISQED 2004: 478-482
6	EE	Jörg Schneider, Vincent Kotzsch, Steffen Rülke: Demonstrator: Reuse Automation for Reconfigurable System-on-Chip Design within a DVB Environment. PARELEC 2004: 177-180
2002
5	EE	Ronny Frevert, Steffen Rülke, Torsten Schäfer, Frank Dresig: Use of HDL Code Checkers to Support the IP Entrance Check - A Requirement Analysis. DSD 2002: 364-370
4	EE	Maik Boden, Jörg Schneider, Klaus Feske, Steffen Rülke: Enhanced Reusability for SoC-Based HW/SW Co-Design. DSD 2002: 94-101
2001
3	EE	Manfred Koegst, Steffen Rülke, Günter Franke, Maria J. Avedillo: Two-Criterial Constraint-Driven FSM State Encoding for Low Power. DSD 2001: 94-101
1998
2	EE	Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske: Multi-Criterial State Assignment for Low Power FSM Design. EUROMICRO 1998: 10261-10268
1997
1	EE	Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske: Low Power Design of FSMs by State Assignment and Disabling Self-Loops. EUROMICRO 1997: 323-330

Coauthor Index

1	Maria J. Avedillo	[3]
2	José Luis Tiburcio Badía	[8]
3	Jürgen Becker	[10] [12]
4	Rene Beckert	[13] [15]
5	Thomas Berndt	[11]
6	Maik Boden	[4] [8] [9] [10] [12] [16]
7	Hans-Jürgen Brand	[7]
8	Rolf Drechsler	[14] [17]
9	Frank Dresig	[5]
10	Erhard Fehlauer	[11]
11	Klaus Feske	[1] [2] [4]
12	Görschwin Fey	[17]
13	Thomas Fiebig	[12] [16]
14	Günter Franke	[1] [2] [3]
15	Ronny Frevert	[5]
16	Thomas Fuchs	[13] [15]
17	Christian Genz	[14]
18	Alex Gleich	[9]
19	Wolfram Hardt	[13] [15]
20	Thomas Klotz	[17]
21	Manfred Koegst	[1] [2] [3] [8]
22	Vincent Kotzsch	[6]
23	Torsten Meibner	[12]
24	Ulrich Nageldinger	[9]
25	Sebastian Ohnewald	[11]
26	Martin Radetzki	[7]
27	Markus Reiband	[16]
28	Peter Reichel	[16]
29	Frank Rogin	[11] [14] [17]
30	Torsten Schäfer	[5]
31	Jörg Schneider	[4] [6]

Colors in the list of coauthors