2009 |
52 | EE | Minwook Ahn,
Yunheung Paek:
Register coalescing techniques for heterogeneous register architecture with copy sifting.
ACM Trans. Embedded Comput. Syst. 8(2): (2009) |
51 | EE | Aviral Shrivastava,
Ilya Issenin,
Nikil Dutt,
Sanghyun Park,
Yunheung Paek:
Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 461-465 (2009) |
50 | EE | Doosan Cho,
Sudeep Pasricha,
Ilya Issenin,
Nikil D. Dutt,
Minwook Ahn,
Yunheung Paek:
Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 554-567 (2009) |
49 | EE | Minwook Ahn,
Yunheung Paek:
Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers.
T. HiPEAC 2: 149-172 (2009) |
2008 |
48 | EE | Jonghee W. Yoon,
Aviral Shrivastava,
Sanghyun Park,
Minwook Ahn,
Reiley Jeyapaul,
Yunheung Paek:
SPKM : A novel graph drawing based algorithm for application mapping onto coarse-grained reconfigurable architectures.
ASP-DAC 2008: 776-782 |
47 | EE | Sanghyun Park,
Aviral Shrivastava,
Yunheung Paek:
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors.
DATE 2008: 1190-1195 |
46 | EE | Doosan Cho,
Sudeep Pasricha,
Ilya Issenin,
Nikil Dutt,
Yunheung Paek,
SunJun Ko:
Compiler driven data layout optimization for regular/irregular array access patterns.
LCTES 2008: 41-50 |
45 | EE | Seongnam Kwon,
Yongjoo Kim,
Woo-Chul Jeun,
Soonhoi Ha,
Yunheung Paek:
A retargetable parallel-programming framework for MPSoC.
ACM Trans. Design Autom. Electr. Syst. 13(3): (2008) |
44 | EE | Sanghyun Park,
Aviral Shrivastava,
Nikil D. Dutt,
Alexandru Nicolau,
Yunheung Paek,
Eugene Earlie:
Register File Power Reduction Using Bypass Sensitive Compiler.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1155-1159 (2008) |
2007 |
43 | | Lynn Choi,
Yunheung Paek,
Sangyeun Cho:
Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings
Springer 2007 |
42 | EE | Doosan Cho,
Ilya Issenin,
Nikil Dutt,
Jonghee W. Yoon,
Yunheung Paek:
Software controlled memory layout reorganization for irregular array access patterns.
CASES 2007: 179-188 |
41 | EE | Doosan Cho,
Ravi Ayyagari,
Gang-Ryung Uh,
Yunheung Paek:
Preprocessing Strategy for Effective Modulo Scheduling on Multi-issue Digital Signal Processors.
CC 2007: 16-31 |
40 | EE | Hanno Scharwächter,
Jonghee M. Yoon,
Rainer Leupers,
Yunheung Paek,
Gerd Ascheid,
Heinrich Meyr:
A code-generator generator for multi-output instructions.
CODES+ISSS 2007: 131-136 |
39 | EE | Minwook Ahn,
Jooyeon Lee,
Yunheung Paek:
Optimistic coalescing for heterogeneous register architectures.
LCTES 2007: 93-102 |
38 | EE | Rajiv Gupta,
Yunheung Paek:
Introduction to the special LCTES'05 issue.
ACM Trans. Embedded Comput. Syst. 6(4): (2007) |
37 | EE | Aviral Shrivastava,
Sanghyun Park,
Eugene Earlie,
Nikil D. Dutt,
Alexandru Nicolau,
Yunheung Paek:
Automatic Design Space Exploration of Register Bypasses in Embedded Processors.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2102-2115 (2007) |
36 | EE | Yunheung Paek,
Minwook Ahn,
Doosan Cho,
Taehwan Kim:
Efficient embedded code generation with multiple load/store instructions.
Softw., Pract. Exper. 37(11): 1133-1159 (2007) |
2006 |
35 | EE | Sanghyun Park,
Eugene Earlie,
Aviral Shrivastava,
Alex Nicolau,
Nikil Dutt,
Yunheung Paek:
Automatic generation of operation tables for fast exploration of bypasses in embedded processors.
DATE 2006: 1197-1202 |
34 | EE | Minwook Ahn,
Jonghee W. Yoon,
Yunheung Paek,
Yoonjin Kim,
Mary Kiemb,
Kiyoung Choi:
A spatial mapping algorithm for heterogeneous coarse-grained reconfigurable architectures.
DATE 2006: 363-368 |
33 | EE | Doosan Cho,
Ravi Ayyagari,
Gang-Ryung Uh,
Yunheung Paek:
Instruction Re-selection for Iterative Modulo Scheduling on High Performance Multi-issue DSPs.
EUC Workshops 2006: 741-754 |
32 | EE | Jeonghun Cho,
Yunheung Paek:
Run-Time Memory Optimization for DDMB Architecture Through a CCB Algorithm.
EUC Workshops 2006: 775-784 |
31 | EE | Yoonjin Kim,
Ilhyun Park,
Kiyoung Choi,
Yunheung Paek:
Power-conscious configuration cache structure and code mapping for coarse-grained reconfigurable architecture.
ISLPED 2006: 310-315 |
30 | EE | Sanghyun Park,
Aviral Shrivastava,
Nikil D. Dutt,
Alexandru Nicolau,
Yunheung Paek,
Eugene Earlie:
Bypass aware instruction scheduling for register file power reduction.
LCTES 2006: 173-181 |
29 | EE | Prasad Kulkarni,
Wankang Zhao,
Stephen Hines,
David B. Whalley,
Xin Yuan,
Robert van Engelen,
Kyle Gallivan,
Jason Hiser,
Jack W. Davidson,
Baosheng Cai,
Mark W. Bailey,
Hwashin Moon,
Kyunghwan Cho,
Yunheung Paek:
VISTA: VPO interactive system for tuning applications.
ACM Trans. Embedded Comput. Syst. 5(4): 819-863 (2006) |
2005 |
28 | | Yunheung Paek,
Rajiv Gupta:
Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05), Chicago, Illinois, USA, June 15-17, 2005
ACM 2005 |
27 | EE | Gang-Ryung Uh,
Yuhong Wang,
David B. Whalley,
Sanjay Jinturkar,
Yunheung Paek,
Vincent Cao,
Chris Burns:
Compiler transformations for effectively exploiting a zero overhead loop buffer.
Softw., Pract. Exper. 35(4): 393-412 (2005) |
2004 |
26 | EE | Yunheung Paek,
Junsik Choi,
Jinoo Joung,
Junseo Lee,
Seonwook Kim:
Exploiting Parallelism in Memory Operations for Code Optimization.
LCPC 2004: 132-148 |
25 | EE | Jeonghun Cho,
Yunheung Paek,
David B. Whalley:
Fast memory bank assignment for fixed-point digital signal processors.
ACM Trans. Design Autom. Electr. Syst. 9(1): 52-74 (2004) |
24 | EE | Jinhwan Kim,
Yunheung Paek,
Gang-Ryung Uh:
Code optimizations for a VLIW-style network processing unit.
Softw., Pract. Exper. 34(9): 847-874 (2004) |
2003 |
23 | EE | Sejong Oh,
Yunheung Paek:
A Quantitative Comparison of Two Retargetable Compilation Approaches.
ICPP 2003: 29- |
22 | EE | Prasad Kulkarni,
Wankang Zhao,
Hwashin Moon,
Kyunghwan Cho,
David B. Whalley,
Jack W. Davidson,
Mark W. Bailey,
Yunheung Paek,
Kyle Gallivan:
Finding effective optimization phase sequences.
LCTES 2003: 12-23 |
21 | EE | Yunheung Paek,
Minwook Ahn,
Soonho Lee:
Case Studies on Automatic Extraction of Target-Specific Architectural Parameters in Complex Code Generation.
SCOPES 2003: 151-166 |
2002 |
20 | EE | Jinhwan Kim,
Sungjoon Jung,
Yunheung Paek,
Gang-Ryung Uh:
Experience with a retargetable compiler for a commercial network processor.
CASES 2002: 178-187 |
19 | EE | Jeonghun Cho,
Jinhwan Kim,
Yunheung Paek:
A Study on Data Allocation of On-Chip Dual Memory Banks.
Interaction between Compilers and Computer Architectures 2002: 68- |
18 | EE | Jeonghun Cho,
Yunheung Paek,
David B. Whalley:
Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms.
LCTES-SCOPES 2002: 130-138 |
17 | EE | Yunheung Paek,
Jay Hoeflinger,
David A. Padua:
Efficient and precise array access analysis.
ACM Trans. Program. Lang. Syst. 24(1): 65-109 (2002) |
16 | EE | Yunheung Paek,
Angeles G. Navarro,
Emilio L. Zapata,
Jay Hoeflinger,
David A. Padua:
An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors.
IEEE Trans. Parallel Distrib. Syst. 13(3): 241-259 (2002) |
15 | EE | Oukseh Lee,
Kwangkeun Yi,
Yunheung Paek:
A proof method for the correctness of modularized 0CFA.
Inf. Process. Lett. 81(4): 179-185 (2002) |
2001 |
14 | EE | Sungjoon Jung,
Yunheung Paek:
The very portable optimizer for digital signal processors.
CASES 2001: 84-92 |
13 | EE | Sang Seok Lim,
Yunheung Paek,
Kyu Ho Park,
Jay Hoeflinger:
A Parallel Programming Environment for a V-Busbased PC-cluste.
CLUSTER 2001: 235- |
12 | | Jay Hoeflinger,
Yunheung Paek,
Kwang Yi:
Unified Interprocedural Parallelism Detection.
International Journal of Parallel Programming 29(2): 185-215 (2001) |
2000 |
11 | EE | Jay Hoeflinger,
Yunheung Paek:
A Comparative Analysis of Dependence Testing Mechanisms.
LCPC 2000: 289-303 |
1999 |
10 | EE | Andrew Sohn,
Yunheung Paek,
Jui-Yuan Ku,
Yuetsu Kodama,
Yoshinori Yamaguchi:
Communication Studies of Single-Threaded and Multithreaded Distributed-Memory Multiprocessors.
HPCA 1999: 310-314 |
9 | EE | Jay Hoeflinger,
Yunheung Paek:
The Access Region Test.
LCPC 1999: 271-285 |
1998 |
8 | EE | Yunheung Paek,
Angeles G. Navarro,
Emilio L. Zapata,
David A. Padua:
Parallelization of Benchmarks for Scalable Shared-Memory Multiprocessors.
IEEE PACT 1998: 401- |
7 | EE | Yunheung Paek,
David A. Padua:
Experimental Study of Compiler Techniques for NUMA Machines.
IPPS/SPDP 1998: 187-193 |
6 | | Yunheung Paek,
Jay Hoeflinger,
David A. Padua:
Simplification of Array Access Patterns for Compiler Optimizations.
PLDI 1998: 60-71 |
1997 |
5 | EE | Angeles G. Navarro,
Emilio L. Zapata,
Yunheung Paek,
David A. Padua:
Compiler Techniques for Effective Communication on Distributed-Memory Multiprocessors.
ICPP 1997: 74-77 |
4 | | Yunheung Paek,
David A. Padua:
Compiling for Scalable Multiprocessors with Polaris.
Parallel Processing Letters 7(4): 425-436 (1997) |
1996 |
3 | | William Blume,
Rudolf Eigenmann,
Keith Faigin,
John Grout,
Jaejin Lee,
Thomas Lawrence,
Jay Hoeflinger,
David A. Padua,
Yunheung Paek,
Paul Petersen,
William M. Pottenger,
Lawrence Rauchwerger,
Peng Tu,
Stephen Weatherford:
Restructuring Programs for High-Speed Computers with Polaris.
ICPP Workshop 1996: 149-161 |
2 | | Yunheung Paek,
David A. Padua:
Automatic Parallelization for Non-cache Coherent Multiprocessors.
LCPC 1996: 266-284 |
1 | | William Blume,
Ramon Doallo,
Rudolf Eigenmann,
John Grout,
Jay Hoeflinger,
Thomas Lawrence,
Jaejin Lee,
David A. Padua,
Yunheung Paek,
William M. Pottenger,
Lawrence Rauchwerger,
Peng Tu:
Parallel Programming with Polaris.
IEEE Computer 29(12): 87-81 (1996) |