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Anshuman Chandra

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2009
29EEAnshuman Chandra, Yasunari Kanzawa, Rohit Kapur: Proactive management of X's in scan chains for compression. ISQED 2009: 260-265
2008
28EEAnshuman Chandra, Felix Ng, Rohit Kapur: Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction. DATE 2008: 462-467
27EEAnshuman Chandra, Rohit Kapur: Interval Based X-Masking for Scan Compression Architectures. ISQED 2008: 821-826
26EEAnshuman Chandra, Rohit Kapur: Bounded Adjacent Fill for Low Capture Power Scan Testing. VTS 2008: 131-138
2007
25EEAnshuman Chandra, Haihua Yan, Rohit Kapur: Multimode Illinois Scan Architecture for Test Application Time and Test Data Volume Reduction. VTS 2007: 84-92
24EEYinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra: Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit. IEEE Trans. VLSI Syst. 15(5): 531-540 (2007)
2006
23EEYinhe Han, Huawei Li, Xiaowei Li, Anshuman Chandra: Response compaction for system-on-a-chip based on advanced convolutional codes. Science in China Series F: Information Sciences 49(2): 262-272 (2006)
2005
22EEYinhe Han, Xiaowei Li, Shivakumar Swaminathan, Yu Hu, Anshuman Chandra: Scan Data Volume Reduction Using Periodically Alterable MUXs Decompressor. Asian Test Symposium 2005: 372-377
21EEYinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra, Xiaoqing Wen: Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores. IEICE Transactions 88-D(9): 2126-2134 (2005)
20EEYinhe Han, Xiaowei Li, Huawei Li, Anshuman Chandra: Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channels Reduction. J. Comput. Sci. Technol. 20(2): 201-209 (2005)
2004
19EEYinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra: Rapid and Energy-Efficient Testing for Embedded Cores. Asian Test Symposium 2004: 8-13
18EEYinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra: Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes. DFT 2004: 298-305
17EEAnshuman Chandra, Krishnendu Chakrabarty: Analysis of Test Application Time for Test Data Compression Methods Based on Compression Codes. J. Electronic Testing 20(2): 199-212 (2004)
2003
16EEYinhe Han, Yongjun Xu, Huawei Li, Xiaowei Li, Anshuman Chandra: Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Teste. Asian Test Symposium 2003: 440-445
15EEVikram Iyengar, Anshuman Chandra, Sharon Schweizer, Krishnendu Chakrabarty: A Unified Approach for SOC Testing Using Test Data Compression and TAM Optimization. DATE 2003: 11188-11190
14EEVikram Iyengar, Anshuman Chandra: A Uni.ed SOC Test Approach Based on Test Data Compression and TAM Design. DFT 2003: 511-518
13EEAnshuman Chandra, Krishnendu Chakrabarty: Test Data Compression and Test Resource Partitioning for System-on-a-Chip Using Frequency-Directed Run-Length (FDR) Codes. IEEE Trans. Computers 52(8): 1076-1088 (2003)
12EEAnshuman Chandra, Krishnendu Chakrabarty: A unified approach to reduce SOC test data volume, scan power and testing time. IEEE Trans. on CAD of Integrated Circuits and Systems 22(3): 352-363 (2003)
2002
11EEAnshuman Chandra, Krishnendu Chakrabarty: Reduction of SOC test data volume, scan power and testing time using alternating run-length codes. DAC 2002: 673-678
10EEAnshuman Chandra, Krishnendu Chakrabarty: Test Resource Partitioning and Reduced Pin-Count Testing Based on Test Data Compression. DATE 2002: 598-603
9EEAnshuman Chandra, Krishnendu Chakrabarty, Rafael A. Medina: How Effective are Compression Codes for Reducing Test Data Volume? VTS 2002: 91-96
8EEAnshuman Chandra, Krishnendu Chakrabarty: Low-power scan testing and test data compression forsystem-on-a-chip. IEEE Trans. on CAD of Integrated Circuits and Systems 21(5): 597-604 (2002)
7EEAnshuman Chandra, Krishnendu Chakrabarty: Test data compression and decompression based on internal scanchains and Golomb coding. IEEE Trans. on CAD of Integrated Circuits and Systems 21(6): 715-722 (2002)
2001
6EEAnshuman Chandra, Krishnendu Chakrabarty: Combining Low-Power Scan Testing and Test Data Compression for System-on-a-Chip. DAC 2001: 166-169
5EEAnshuman Chandra, Krishnendu Chakrabarty: Efficient test data compression and decompression for system-on-a-chip using internal scan chains and Golomb coding. DATE 2001: 145-149
4EEAnshuman Chandra, Krishnendu Chakrabarty: Frequency-Directed Run-Length (FDR) Codes with Application to System-on-a-Chip Test Data Compression. VTS 2001: 42-47
3EEAnshuman Chandra, Krishnendu Chakrabarty: Test Resource Partitioning for SOCs. IEEE Design & Test of Computers 18(5): 80-91 (2001)
2EEAnshuman Chandra, Krishnendu Chakrabarty: System-on-a-chip test-data compression and decompressionarchitectures based on Golomb codes. IEEE Trans. on CAD of Integrated Circuits and Systems 20(3): 355-368 (2001)
2000
1EEAnshuman Chandra, Krishnendu Chakrabarty: Test Data Compression for System-on-a-Chip Using Golomb Codes. VTS 2000: 113-120

Coauthor Index

1Krishnendu Chakrabarty [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15] [17]
2Yinhe Han [16] [18] [19] [20] [21] [22] [23] [24]
3Yu Hu [18] [19] [21] [22] [24]
4Vikram Iyengar [14] [15]
5Yasunari Kanzawa [29]
6Rohit Kapur [25] [26] [27] [28] [29]
7Huawei Li [16] [18] [19] [20] [21] [23] [24]
8Xiaowei Li [16] [18] [19] [20] [21] [22] [23] [24]
9Rafael A. Medina [9]
10Felix Ng [28]
11Sharon Schweizer [15]
12Shivakumar Swaminathan [22]
13Xiaoqing Wen [21]
14Yongjun Xu [16]
15Haihua Yan [25]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)