2009 |
29 | EE | Anshuman Chandra,
Yasunari Kanzawa,
Rohit Kapur:
Proactive management of X's in scan chains for compression.
ISQED 2009: 260-265 |
2008 |
28 | EE | Anshuman Chandra,
Felix Ng,
Rohit Kapur:
Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction.
DATE 2008: 462-467 |
27 | EE | Anshuman Chandra,
Rohit Kapur:
Interval Based X-Masking for Scan Compression Architectures.
ISQED 2008: 821-826 |
26 | EE | Anshuman Chandra,
Rohit Kapur:
Bounded Adjacent Fill for Low Capture Power Scan Testing.
VTS 2008: 131-138 |
2007 |
25 | EE | Anshuman Chandra,
Haihua Yan,
Rohit Kapur:
Multimode Illinois Scan Architecture for Test Application Time and Test Data Volume Reduction.
VTS 2007: 84-92 |
24 | EE | Yinhe Han,
Yu Hu,
Xiaowei Li,
Huawei Li,
Anshuman Chandra:
Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit.
IEEE Trans. VLSI Syst. 15(5): 531-540 (2007) |
2006 |
23 | EE | Yinhe Han,
Huawei Li,
Xiaowei Li,
Anshuman Chandra:
Response compaction for system-on-a-chip based on advanced convolutional codes.
Science in China Series F: Information Sciences 49(2): 262-272 (2006) |
2005 |
22 | EE | Yinhe Han,
Xiaowei Li,
Shivakumar Swaminathan,
Yu Hu,
Anshuman Chandra:
Scan Data Volume Reduction Using Periodically Alterable MUXs Decompressor.
Asian Test Symposium 2005: 372-377 |
21 | EE | Yinhe Han,
Yu Hu,
Xiaowei Li,
Huawei Li,
Anshuman Chandra,
Xiaoqing Wen:
Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores.
IEICE Transactions 88-D(9): 2126-2134 (2005) |
20 | EE | Yinhe Han,
Xiaowei Li,
Huawei Li,
Anshuman Chandra:
Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channels Reduction.
J. Comput. Sci. Technol. 20(2): 201-209 (2005) |
2004 |
19 | EE | Yinhe Han,
Yu Hu,
Huawei Li,
Xiaowei Li,
Anshuman Chandra:
Rapid and Energy-Efficient Testing for Embedded Cores.
Asian Test Symposium 2004: 8-13 |
18 | EE | Yinhe Han,
Yu Hu,
Huawei Li,
Xiaowei Li,
Anshuman Chandra:
Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes.
DFT 2004: 298-305 |
17 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Analysis of Test Application Time for Test Data Compression Methods Based on Compression Codes.
J. Electronic Testing 20(2): 199-212 (2004) |
2003 |
16 | EE | Yinhe Han,
Yongjun Xu,
Huawei Li,
Xiaowei Li,
Anshuman Chandra:
Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Teste.
Asian Test Symposium 2003: 440-445 |
15 | EE | Vikram Iyengar,
Anshuman Chandra,
Sharon Schweizer,
Krishnendu Chakrabarty:
A Unified Approach for SOC Testing Using Test Data Compression and TAM Optimization.
DATE 2003: 11188-11190 |
14 | EE | Vikram Iyengar,
Anshuman Chandra:
A Uni.ed SOC Test Approach Based on Test Data Compression and TAM Design.
DFT 2003: 511-518 |
13 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Test Data Compression and Test Resource Partitioning for System-on-a-Chip Using Frequency-Directed Run-Length (FDR) Codes.
IEEE Trans. Computers 52(8): 1076-1088 (2003) |
12 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
A unified approach to reduce SOC test data volume, scan power and testing time.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(3): 352-363 (2003) |
2002 |
11 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Reduction of SOC test data volume, scan power and testing time using alternating run-length codes.
DAC 2002: 673-678 |
10 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Test Resource Partitioning and Reduced Pin-Count Testing Based on Test Data Compression.
DATE 2002: 598-603 |
9 | EE | Anshuman Chandra,
Krishnendu Chakrabarty,
Rafael A. Medina:
How Effective are Compression Codes for Reducing Test Data Volume?
VTS 2002: 91-96 |
8 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Low-power scan testing and test data compression forsystem-on-a-chip.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(5): 597-604 (2002) |
7 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Test data compression and decompression based on internal scanchains and Golomb coding.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(6): 715-722 (2002) |
2001 |
6 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Combining Low-Power Scan Testing and Test Data Compression for System-on-a-Chip.
DAC 2001: 166-169 |
5 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Efficient test data compression and decompression for system-on-a-chip using internal scan chains and Golomb coding.
DATE 2001: 145-149 |
4 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Frequency-Directed Run-Length (FDR) Codes with Application to System-on-a-Chip Test Data Compression.
VTS 2001: 42-47 |
3 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Test Resource Partitioning for SOCs.
IEEE Design & Test of Computers 18(5): 80-91 (2001) |
2 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
System-on-a-chip test-data compression and decompressionarchitectures based on Golomb codes.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(3): 355-368 (2001) |
2000 |
1 | EE | Anshuman Chandra,
Krishnendu Chakrabarty:
Test Data Compression for System-on-a-Chip Using Golomb Codes.
VTS 2000: 113-120 |