Emmanouil Kalligeros

2008
16	EE	V. Tenentes, Xrysovalantis Kavousianos, Emmanouil Kalligeros: State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores. DATE 2008: 474-479
15	EE	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos: Multilevel-Huffman Test-Data Compression for IP Cores With Multiple Scan Chains. IEEE Trans. VLSI Syst. 16(7): 926-931 (2008)
14	EE	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos: Test Data Compression Based on Variable-to-Variable Huffman Encoding With Codeword Reusability. IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1333-1338 (2008)
2007
13	EE	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos: Optimal Selective Huffman Coding for Test-Data Compression. IEEE Trans. Computers 56(8): 1146-1152 (2007)
12	EE	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos: Multilevel Huffman Coding: An Efficient Test-Data Compression Method for IP Cores. IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1070-1083 (2007)
2006
11	EE	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos: Efficient test-data compression for IP cores using multilevel Huffman coding. DATE 2006: 1033-1038
10	EE	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos: Efficient Multiphase Test Set Embedding for Scan-based Testing. ISQED 2006: 433-438
2005
9	EE	Emmanouil Kalligeros, D. Kaseridis, Xrysovalantis Kavousianos, Dimitris Nikolos: Reseeding-Based Test Set Embedding with Reduced Test Sequences. ISQED 2005: 226-231
2004
8	EE	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos: Multiphase BIST: a new reseeding technique for high test-data compression. IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1429-1446 (2004)
2003
7	EE	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos: A highly regular multi-phase reseeding technique for scan-based BIST. ACM Great Lakes Symposium on VLSI 2003: 295-298
2002
6	EE	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos: A ROMless LFSR Reseeding Scheme for Scan-based BIST. Asian Test Symposium 2002: 206-
5	EE	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos: An Efficient Seeds Selection Method for LFSR-Based Test-per-Clock BIST. ISQED 2002: 261-266
4	EE	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos: On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST. J. Electronic Testing 18(3): 315-332 (2002)
3	EE	Dimitris Bakalis, Emmanouil Kalligeros, Dimitris Nikolos, Haridimos T. Vergos, George Alexiou: On the design of low power BIST for multipliers with Booth encoding and Wallace tree summation. Journal of Systems Architecture 48(4-5): 125-135 (2002)
2001
2	EE	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos: A New Reseeding Technique for LFSR-Based Test Pattern Generation. IOLTW 2001: 80-86
2000
1	EE	Dimitris Bakalis, Dimitris Nikolos, George Alexiou, Emmanouil Kalligeros, Haridimos T. Vergos: Low Power BIST for Wallace Tree-Based Fast Multipliers. ISQED 2000: 433-438

Coauthor Index

1	George Alexiou (G. Ph. Alexiou)	[1] [3]
2	Dimitris Bakalis	[1] [2] [3] [4] [5]
3	D. Kaseridis	[9]
4	Xrysovalantis Kavousianos	[2] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
5	Dimitris Nikolos	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
6	V. Tenentes	[16]
7	Haridimos T. Vergos	[1] [3]