Katarina Paulsson

2008
15	EE	Katarina Paulsson, Michael Hübner, Jürgen Becker: Cost-and Power Optimized FPGA based System Integration: Methodologies and Integration of a Low-Power Capacity-based Measurement Application on Xilinx FPGAs. DATE 2008: 50-55
14	EE	Lars Braun, Katarina Paulsson, Herrmann Krömer, Michael Hübner, Jürgen Becker: Data path driven waveform-like reconfiguration. FPL 2008: 607-610
13	EE	Katarina Paulsson, Michael Hübner, Jürgen Becker: Exploitation of dynamic and partial hardware reconfiguration for on-line power/performance optimization. FPL 2008: 699-700
12	EE	Katarina Paulsson, Ulrich Viereck, Michael Hübner, Jürgen Becker: Exploitation of the External JTAG Interface for Internally Controlled Configuration Readback and Self-Reconfiguration of Spartan 3 FPGAs. ISVLSI 2008: 304-309
11	EE	Juanjo Noguera, Robert Esser, Katarina Paulsson, Michael Hübner, Jürgen Becker: Towards Novel Approaches in Design Automation for FPGA Power Optimization. PATMOS 2008: 419-428
2007
10	EE	Katarina Paulsson, Michael Hübner, Günther Auer, Michael Dreschmann, Jürgen Becker: Implementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs. FPL 2007: 351-356
9	EE	Katarina Paulsson, Michael Hübner, Jürgen Becker, Jean-Marc Philippe, Christian Gamrat: On-line Routing of Reconfigurable Functions for Future Self-Adaptive Systems - Investigations within the ÆTHER Project. FPL 2007: 415-422
8		Katarina Paulsson, Michael Hübner, Salih Bayar, Jürgen Becker: Exploitation of Run-Time Partial Reconfiguration for Dynamic Power Management in Xilinx Spartan III-based Systems. ReCoSoC 2007: 1-6
2006
7	EE	Katarina Paulsson, Michael Hübner, Jürgen Becker: Strategies to On- Line Failure Recovery in Self- Adaptive Systems based on Dynamic and Partial Reconfiguration. AHS 2006: 288-291
6	EE	Jürgen Becker, Michael Hübner, Katarina Paulsson: Physical 2D Morphware and Power Reduction Methods for Everyone. Dynamically Reconfigurable Architectures 2006
5	EE	Katarina Paulsson, Michael Hübner, Markus Jung, Jürgen Becker: Methods for Run-time Failure Recognition and Recovery in dynamic and partial Reconfigurable Systems Based on Xilinx Virtex-II Pro FPGAs. ISVLSI 2006: 159-166
4	EE	Katarina Paulsson, Michael Hübner, Jürgen Becker: On-line optimization of FPGA power-dissipation by exploiting run-time adaption of communication primitives. SBCCI 2006: 173-178
2005
3		Michael Hübner, Katarina Paulsson, Marcus Stitz, Jürgen Becker: Novel Seamless Design-Flow for Partial and Dynamic Reconfigurable Systems with Customized Communication Structures based on Xilinx Virtex-II FPGAs. ARCS Workshops 2005: 39-44
2	EE	Michael Hübner, Katarina Paulsson, Jürgen Becker: Parallel and Flexible Multiprocessor System-On-Chip for Adaptive Automotive Applications based on Xilinx MicroBlaze Soft-Cores. IPDPS 2005
1		Jürgen Becker, Michael Hübner, Katarina Paulsson, Alexander Thomas: Dynamic Reconfiguration On-Demand: Real-time Adaptivity in Next Generation Microelectronics. ReCoSoC 2005: 35-42

Coauthor Index

1	Günther Auer	[10]
2	Salih Bayar	[8]
3	Jürgen Becker	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
4	Lars Braun	[14]
5	Michael Dreschmann	[10]
6	Robert Esser	[11]
7	Christian Gamrat	[9]
8	Michael Hübner	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
9	Markus Jung	[5]
10	Herrmann Krömer	[14]
11	Juanjo Noguera	[11]
12	Jean-Marc Philippe	[9]
13	Marcus Stitz	[3]
14	Alexander Thomas	[1]
15	Ulrich Viereck	[12]