2008 | ||
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131 | EE | Pieter J. Mosterman, Don Orofino, Janos Sztipanovits, Ahmed Amine Jerraya, Wido Kruijtzer, Víctor Reyes, Christos G. Cassandras, Grant Martin: Automatically Realising Embedded Systems from High-Level Functional Models. DATE 2008 |
130 | EE | Katalin Popovici, Xavier Guerin, Frédéric Rousseau, Pier Stanislao Paolucci, Ahmed Amine Jerraya: Platform-based software design flow for heterogeneous MPSoC. ACM Trans. Embedded Comput. Syst. 7(4): (2008) |
129 | EE | Wayne Wolf, Ahmed Amine Jerraya, Grant Martin: Multiprocessor System-on-Chip (MPSoC) Technology. IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1701-1713 (2008) |
128 | EE | Lobna Kriaa, Aimen Bouchhima, Marius Gligor, Anne-Marie Fouillart, Frédéric Pétrot, Ahmed Amine Jerraya: Parallel Programming of Multi-processor SoC: A HW-SW Interface Perspective. International Journal of Parallel Programming 36(1): 68-92 (2008) |
2007 | ||
127 | EE | Márcio Oyamada, Flávio Rech Wagner, Marius Bonaciu, Wander O. Cesário, Ahmed Amine Jerraya: Software Performance Estimation in MPSoC Design. ASP-DAC 2007: 38-43 |
126 | EE | Patrice Gerin, Hao Shen, A. Chureau, Aimen Bouchhima, Ahmed Amine Jerraya: Flexible and Executable Hardware/Software Interface Modeling for Multiprocessor SoC Design Using SystemC. ASP-DAC 2007: 390-395 |
125 | EE | Xavier Guerin, Katalin Popovici, Wassim Youssef, Frédéric Rousseau, Ahmed Amine Jerraya: Flexible Application Software Generation for Heterogeneous Multi-Processor System-on-Chip. COMPSAC (1) 2007: 279-286 |
124 | EE | Kai Huang, Sang-Il Han, Katalin Popovici, Lisane B. de Brisolara, Xavier Guerin, Lei Li, Xiaolang Yan, Soo-Ik Chae, Luigi Carro, Ahmed Amine Jerraya: Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264. DAC 2007: 39-42 |
123 | EE | Ahmed Amine Jerraya: HW/SW implementation from abstract architecture models. DATE 2007: 1470-1471 |
122 | EE | Katalin Popovici, Xavier Guerin, Frédéric Rousseau, Pier Stanislao Paolucci, Ahmed Amine Jerraya: Efficient Software Development Platforms for Multimedia Applications at Different Abstraction Levels. IEEE International Workshop on Rapid System Prototyping 2007: 113-122 |
121 | EE | Youngchul Cho, Nacer-Eddine Zergainoh, Kiyoung Choi, Ahmed Amine Jerraya: Low Runtime-Overhead Software Synthesis for Communicating Concurrent Processes. IEEE International Workshop on Rapid System Prototyping 2007: 195-201 |
120 | EE | Youngchul Cho, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya, Kiyoung Choi: Buffer Size Reduction through Control-Flow Decomposition. RTCSA 2007: 183-190 |
119 | EE | Lisane B. de Brisolara, Sang-Il Han, Xavier Guerin, Luigi Carro, Ricardo Reis, Soo-Ik Chae, Ahmed Amine Jerraya: Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC. SCOPES 2007: 81-89 |
118 | EE | Katalin Popovici, Ahmed Amine Jerraya: Simulink based hardware-software codesign flow for heterogeneous MPSoC. SCSC 2007: 497-504 |
117 | EE | Flávio Rech Wagner, Wander O. Cesário, Ahmed Amine Jerraya: Hardware/software IP integration using the ROSES design environment. ACM Trans. Embedded Comput. Syst. 6(3): (2007) |
116 | EE | Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne Wolf: Roundtable: Envisioning the Future for Multiprocessor SoC. IEEE Design & Test of Computers 24(2): 174-183 (2007) |
2006 | ||
115 | EE | Marius Bonaciu, Aimen Bouchhima, Mohamed-Wassim Youssef, Xi Chen, Wander O. Cesário, Ahmed Amine Jerraya: High-level architecture exploration for MPEG4 encoder with custom parameters. ASP-DAC 2006: 372-377 |
114 | EE | Sang-Il Han, Soo-Ik Chae, Ahmed Amine Jerraya: Functional modeling techniques for efficient SW code generation of video codec applications. ASP-DAC 2006: 935-940 |
113 | EE | Pier Stanislao Paolucci, Ahmed Amine Jerraya, Rainer Leupers, Lothar Thiele, Piero Vicini: SHAPES: : a tiled scalable software hardware architecture platform for embedded systems. CODES+ISSS 2006: 167-172 |
112 | EE | Ahmed Amine Jerraya, Aimen Bouchhima, Frédéric Pétrot: Programming models and HW-SW interfaces abstraction for multi-processor SoC. DAC 2006: 280-285 |
111 | EE | Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Amine Jerraya: Buffer memory optimization for video codec application modeled in Simulink. DAC 2006: 689-694 |
110 | EE | Florin Dumitrascu, Iuliana Bacivarov, Lorenzo Pieralisi, Marius Bonaciu, Ahmed Amine Jerraya: Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application. DATE Designers' Forum 2006: 166-171 |
109 | EE | Lobna Kriaa, Aimen Bouchhima, Wassim Youssef, Frédéric Pétrot, Anne-Marie Fouillart, Ahmed Amine Jerraya: Service Based Component Design Approach for Flexible Hardware/Software Interface Modeling. IEEE International Workshop on Rapid System Prototyping 2006: 156-162 |
108 | EE | Benaoumeur Senouci, Aimen Bouchhima, Frédéric Rousseau, Frédéric Pétrot, Ahmed Amine Jerraya: Fast Prototyping of POSIX Based Applications on a Multiprocessor SoC Architecture: "Hardware-Dependent Software Oriented Approach". IEEE International Workshop on Rapid System Prototyping 2006: 69-75 |
107 | EE | Ahmed Amine Jerraya, Trevor N. Mudge: Guest editorial: Concurrent hardware and software design for multiprocessor SoC. ACM Trans. Embedded Comput. Syst. 5(2): 259-262 (2006) |
106 | EE | Nacer-Eddine Zergainoh, Ludovic Tambour, Ahmed Amine Jerraya: Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation. IEEE Trans. VLSI Syst. 14(4): 349-360 (2006) |
2005 | ||
105 | EE | Youngchul Cho, Sungjoo Yoo, Kiyoung Choi, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Scheduler implementation in MP SoC design. ASP-DAC 2005: 151-156 |
104 | EE | Nacer-Eddine Zergainoh, Katalin Popovici, Ahmed Amine Jerraya, Pascal Urard: IP-block-based design environment for high-throughput VLSI dedicated digital signal processing systems. ASP-DAC 2005: 612-618 |
103 | EE | Aimen Bouchhima, Iuliana Bacivarov, Wassim Youssef, Marius Bonaciu, Ahmed Amine Jerraya: Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration. ASP-DAC 2005: 969-972 |
102 | EE | Adriano Sarmento, Lobna Kriaa, Arnaud Grasset, Mohamed-Wassim Youssef, Aimen Bouchhima, Frédéric Rousseau, Wander O. Cesário, Ahmed Amine Jerraya: Service dependency graph: an efficient model for hardware/software interfaces modeling and generation for SoC design. CODES+ISSS 2005: 261-266 |
101 | EE | Aimen Bouchhima, Xi Chen, Frédéric Pétrot, Wander O. Cesário, Ahmed Amine Jerraya: A unified HW/SW interface model to remove discontinuities between HW and SW design. EMSOFT 2005: 159-163 |
100 | EE | R. Lemaire, Fabien Clermidy, Y. Durand, D. Lattard, Ahmed Amine Jerraya: Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2. IEEE International Workshop on Rapid System Prototyping 2005: 24-30 |
99 | EE | Arnaud Grasset, Frédéric Rousseau, Ahmed Amine Jerraya: Automatic Generation of Component Wrappers by Composition of Hardware Library Elements Starting from Communication Service Specification. IEEE International Workshop on Rapid System Prototyping 2005: 47-53 |
98 | Wander O. Cesário, Flávio Rech Wagner, Ahmed Amine Jerraya: Hardware/Software Interfaces Design for SoC. The Industrial Information Technology Handbook 2005: 0- | |
97 | EE | Ahmed Amine Jerraya, Wayne Wolf: Hardware/Software Interface Codesign for Embedded Systems. IEEE Computer 38(2): 63-69 (2005) |
96 | EE | Ahmed Amine Jerraya, Hannu Tenhunen, Wayne Wolf: Guest Editors' Introduction: Multiprocessor Systems-on-Chips. IEEE Computer 38(7): 36-40 (2005) |
95 | EE | Iuliana Bacivarov, Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya: ChronoSym: a new approach for fast and accurate SoC cosimulation. IJES 1(1/2): 103-111 (2005) |
94 | EE | Nacer-Eddine Zergainoh, Amer Baghdadi, Ahmed Amine Jerraya: Hardware/software codesign of on-chip communication architecture for application-specific multiprocessor system-on-chip. IJES 1(1/2): 112-124 (2005) |
93 | EE | Nacer-Eddine Zergainoh, Ludovic Tambour, Henri Michel, Ahmed Amine Jerraya: Méthodes de correction de retard dans les modèles RTL des systèmes monopuces DSP obtenus par assemblage de composants IP : fondement théorique et implémentation. Technique et Science Informatiques 24(10): 1227-1257 (2005) |
92 | Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya: Conception des interfaces logiciel-matériel pour l'intégration des mémoires globales dans les systèmes monopuces. Technique et Science Informatiques 24(4): 369-394 (2005) | |
2004 | ||
91 | EE | Ahmed Amine Jerraya: EuroSoC: towards a joint university/industry research infrastructure for system on chip and system in package. ASP-DAC 2004: 18 |
90 | EE | Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya: Fast and accurate timed execution of high level embedded software using HW/SW interface simulation model. ASP-DAC 2004: 469-474 |
89 | EE | Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik Chae, Ahmed Amine Jerraya: An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. DAC 2004: 250-255 |
88 | EE | Mohamed-Wassim Youssef, Sungjoo Yoo, Arif Sasongko, Yanick Paviot, Ahmed Amine Jerraya: Debugging HW/SW interface for MPSoC: video encoder system design case study. DAC 2004: 908-913 |
87 | EE | Mohamed-Anouar Dziri, Wander O. Cesário, Flávio Rech Wagner, Ahmed Amine Jerraya: Unified Component Integration Flow for Multi-Processor SoC Design and Validation. DATE 2004: 1132-1137 |
86 | EE | Sungjoo Yoo, Mohamed-Wassim Youssef, Aimen Bouchhima, Ahmed Amine Jerraya, Mario Diaz-Nava: Multi-Processor SoC Design Methodology Using a Concept of Two-Layer Hardware-Dependent Software. DATE 2004: 1382-1383 |
85 | EE | Ahmed Amine Jerraya: Long Term Trends for Embedded System Design. DSD 2004: 20-26 |
84 | EE | Arnaud Grasset, Frédéric Rousseau, Ahmed Amine Jerraya: Network Interface Generation for MPSOC: From Communication Service Requirements to RTL Implementation. IEEE International Workshop on Rapid System Prototyping 2004: 66-69 |
83 | EE | Ferid Gharsalli, Amer Baghdadi, Marius Bonaciu, Giedrius Majauskas, Wander O. Cesário, Ahmed Amine Jerraya: An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor. IEEE International Workshop on Rapid System Prototyping 2004: 80-87 |
82 | EE | Adriano Sarmento, Wander O. Cesário, Ahmed Amine Jerraya: Automatic Building of Executable Models from Abstract SoC Architectures Made of Heterogeneous Subsystems. IEEE International Workshop on Rapid System Prototyping 2004: 88-95 |
81 | EE | Flávio Rech Wagner, Wander O. Cesário, Luigi Carro, Ahmed Amine Jerraya: Strategies for the integration of hardware and software IP components in embedded systems-on-chip. Integration 37(4): 223-252 (2004) |
80 | EE | Wander O. Cesário, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Ahmed Amine Jerraya: Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits. Journal of Systems and Software 70(3): 229-244 (2004) |
2003 | ||
79 | EE | Sungjoo Yoo, Ahmed Amine Jerraya: Introduction to Hardware Abstraction Layers for SoC. DATE 2003: 10336-10337 |
78 | EE | Sungjoo Yoo, Iuliana Bacivarov, Aimen Bouchhima, Yanick Paviot, Ahmed Amine Jerraya: Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer. DATE 2003: 10550-10555 |
77 | EE | Arif Sasongko, Amer Baghdadi, Frédéric Rousseau, Ahmed Amine Jerraya: Embedded Application Prototyping on a Communication-Restricted Reconfigurable. IEEE International Workshop on Rapid System Prototyping 2003: 33-39 |
76 | EE | Ludovic Tambour, Nacer-Eddine Zergainoh, Pascal Urard, Henri Michel, Ahmed Amine Jerraya: An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells. IEEE International Workshop on Rapid System Prototyping 2003: 56-63 |
75 | EE | F. Hunsinger, Sebastien Francois, Ahmed Amine Jerraya: Definition of a systematic method for the generation of software test programs allowing the functional verification of System On Chip (SoC). MTV 2003: 11- |
74 | Ahmed Amine Jerraya: Hot Topics at HLDVT 02. IEEE Design & Test of Computers 20(1): 92- (2003) | |
2002 | ||
73 | Shuvra S. Bhattacharyya, Trevor N. Mudge, Wayne Wolf, Ahmed Amine Jerraya: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002 ACM 2002 | |
72 | EE | Ferid Gharsalli, Samy Meftali, Frédéric Rousseau, Ahmed Amine Jerraya: Automatic generation of embedded memory wrapper for multiprocessor SoC. DAC 2002: 596-601 |
71 | EE | Wander O. Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava: Component-based design approach for multicore SoCs. DAC 2002: 789-794 |
70 | EE | Joseph Borel, G. Matheron, Ahmed Amine Jerraya, S. Resve, M. Rogers, Wolfgang Rosenstiel, Irmtraud Rugen-Herzig, F. Theewen: MEDEA+ and ITRS Roadmaps. DATE 2002: 328-329 |
69 | EE | Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, Ahmed Amine Jerraya: Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design. DATE 2002: 620-627 |
68 | EE | Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima, Gabriela Nicolescu: Validation in a Component-Based Design Flow for Multicore SoCs. ISSS 2002: 162-167 |
67 | EE | Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali, Frédéric Rousseau, Ferid Gharsalli: Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design. ISSS 2002: 26-31 |
66 | EE | Gabriela Nicolescu, S. Martinez, Lobna Kriaa, Wassim Youssef, Sungjoo Yoo, Benoît Charlot, Ahmed Amine Jerraya: Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design. VLSI Design 2002: 426- |
65 | EE | Wander O. Cesário, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Lovic Gauthier, Mario Diaz-Nava: Multiprocessor SoC Platforms: A Component-Based Design Approach. IEEE Design & Test of Computers 19(6): 52-63 (2002) |
64 | EE | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya: Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems. IEEE Trans. Software Eng. 28(9): 822-831 (2002) |
63 | EE | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya: Exploration de l'espace des solutions architecturales dans le codesign. Technique et Science Informatiques 21(1): 9-35 (2002) |
62 | EE | Gabriela Nicolescu, Kjetil Svarstad, Wander O. Cesário, Lovic Gauthier, Damien Lyonnard, Sungjoo Yoo, Philippe Coste, Ahmed Amine Jerraya: Desiderata pour la spécification et la conception des systèmes électroniques. Technique et Science Informatiques 21(3): 291-314 (2002) |
2001 | ||
61 | EE | Patrice Gerin, Sungjoo Yoo, Gabriela Nicolescu, Ahmed Amine Jerraya: Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures. ASP-DAC 2001: 63-68 |
60 | EE | Kjetil Svarstad, Nezih Ben-Fredj, Gabriela Nicolescu, Ahmed Amine Jerraya: A higher level system communication model for object-oriented specification and design of embedded systems. ASP-DAC 2001: 69-77 |
59 | EE | Sungjoo Yoo, Gabriela Nicolescu, Damien Lyonnard, Amer Baghdadi, Ahmed Amine Jerraya: A generic wrapper architecture for multi-processor SoC cosimulation and design. CODES 2001: 195-200 |
58 | EE | Damien Lyonnard, Sungjoo Yoo, Amer Baghdadi, Ahmed Amine Jerraya: Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. DAC 2001: 518-523 |
57 | EE | Amer Baghdadi, Damien Lyonnard, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: An efficient architecture model for systematic design of application-specific multiprocessor SoC. DATE 2001: 55-63 |
56 | EE | Lovic Gauthier, Sungjoo Yoo, Ahmed Amine Jerraya: Automatic generation and targeting of application specific operating systems and embedded systems software. DATE 2001: 679-685 |
55 | EE | Ahmed Amine Jerraya, G. Matheron: Electronic system design methodology: Europe's positioning. DATE 2001: 720-721 |
54 | EE | Gabriela Nicolescu, Sungjoo Yoo, Ahmed Amine Jerraya: Mixed-level cosimulation for fine gradual refinement of communication in SoC design. DATE 2001: 754-759 |
53 | EE | Kjetil Svarstad, Gabriela Nicolescu, Ahmed Amine Jerraya: A model for describing communication between aggregate objects in the specification and design of embedded systems. DATE 2001: 77-85 |
52 | EE | Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya: Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design. IEEE International Workshop on Rapid System Prototyping 2001: 110-115 |
51 | Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya: An optimal memory allocation for application-specific multiprocessor system-on-chip. ISSS 2001: 19-24 | |
50 | Ahmed Amine Jerraya, Pierre G. Paulin, Richard Norman, Feliks J. Welfeld: Programming models for network processors (Panel). ISSS 2001: 202 | |
49 | Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya: Automatic Code-Transformation and Architecture Refinement for Application-Specific Multiprocessor SoCs with Shared Memory. VLSI-SOC 2001: 193-204 | |
48 | Ahmed Amine Jerraya: Two Enduring Questions for Computer Design. IEEE Design & Test of Computers 18(3): 128- (2001) | |
47 | Wayne Wolf, Ahmed Amine Jerraya: Application-Specific System-on-a-Chip Multiprocessors. IEEE Design & Test of Computers 18(5): 7- (2001) | |
46 | EE | Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya: Colif: A Design Representation for Application-Specific Multiprocessor SOCs. IEEE Design & Test of Computers 18(5): 8-20 (2001) |
45 | EE | Lovic Gauthier, Sungjoo Yoo, Ahmed Amine Jerraya: Automatic generation and targeting of application-specificoperating systems and embedded systems software. IEEE Trans. on CAD of Integrated Circuits and Systems 20(11): 1293-1301 (2001) |
2000 | ||
44 | EE | Salvador Mir, Benoît Charlot, Gabriela Nicolescu, Philippe Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz: Towards design and validation of mixed-technology SOCs. ACM Great Lakes Symposium on VLSI 2000: 29-33 |
43 | EE | Rolf Ernst, Ahmed Amine Jerraya: embedded system design with multiple languages: embedded tutorial. ASP-DAC 2000: 391-396 |
42 | EE | Lovic Gauthier, Ahmed Amine Jerraya: Cycle-True Simulation of the ST10 Microcontroller. DATE 2000: 742 |
41 | Amer Baghdadi, Nacer-Eddine Zergainoh, Damien Lyonnard, Ahmed Amine Jerraya: Generic Architecture Platform for Multiprocessor System-On-Chip Design. DIPES 2000: 53-64 | |
40 | Nacer-Eddine Zergainoh, Amer Baghdadi, Ludovic Tambour, Damien Lyonnard, Lovic Gauthier, Ahmed Amine Jerraya: Framework for System Design, Validation and Fast Prototyping of Multiprocessor System-On-Chip. DIPES 2000: 99-110 | |
39 | EE | Wander O. Cesário, Ahmed Amine Jerraya, Zoltan Sugar, Imed Moussa: Rethinking Behavioral Synthesis for a Better Integration within Existing Design Flows. ICCD 2000: 513-518 |
38 | EE | F. Hessel, Philippe Coste, Gabriela Nicolescu, P. LeMarrec, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Multi-Level Communication Synthesis of Heterogeneous Multilanguage Specification. ICCD 2000: 525- |
37 | EE | Lovic Gauthier, Ahmed Amine Jerraya: Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals. IEEE International Workshop on Rapid System Prototyping 2000: 60-65 |
36 | EE | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, T. Roudier, Ahmed Amine Jerraya: Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems. IEEE International Workshop on Rapid System Prototyping 2000: 8-13 |
35 | EE | Wander O. Cesário, Zoltan Sugar, Imed Moussa, Ahmed Amine Jerraya: Efficient Integration of Behavioral Synthesis with Existing Design Flows. ISSS 2000: 85-90 |
1999 | ||
34 | Ahmed Amine Jerraya, Luciano Lavagno, Frank Vahid: Proceedings of the Seventh International Workshop on Hardware/Software Codesign, CODES 1999, Rome, Italy, 1999 ACM 1999 | |
33 | EE | Philippe Coste, F. Hessel, P. LeMarrec, Zoltan Sugar, M. Romdhani, Rodolph Suescun, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Multilanguage design of heterogeneous systems. CODES 1999: 54-58 |
32 | EE | Imed Moussa, Zoltan Sugar, Rodolph Suescun, Mario Diaz-Nava, Marco Pavesi, Salvatore Crudo, Luca Gazi, Ahmed Amine Jerraya: Comparing RTL and Behavioral Design Methodologies in the Case of a 2M-Transistor ATM Shaper. DAC 1999: 598-603 |
31 | EE | Ahmed Amine Jerraya, Rolf Ernst: Multi-Language System Design. DATE 1999: 696- |
30 | EE | F. Hessel, Philippe Coste, P. LeMarrec, Nacer-Eddine Zergainoh, Jean-Marc Daveau, Ahmed Amine Jerraya: Communication Interface Synthesis for Multilanguage Specifications. IEEE International Workshop on Rapid System Prototyping 1999: 15-20 |
1998 | ||
29 | Gaetano Borriello, Ahmed Amine Jerraya, Luciano Lavagno: Proceedings of the Sixth International Workshop on Hardware/Software Codesign, CODES 1998, Seattle, Washington, USA, March 15-18, 1998 IEEE Computer Society 1998 | |
28 | EE | Jean-Marc Daveau, Gilberto Fernandes Marchioro, Ahmed Amine Jerraya: Hardware/software co-design of an ATM network interface card: a case study. CODES 1998: 111-115 |
27 | EE | A. Jemai, Polen Kission, Ahmed Amine Jerraya: Architectural Simulation in the Context of Behavioral Synthesis. DATE 1998: 590-595 |
26 | F. Hessel, P. LeMarrec, Carlos A. Valderrama, M. Romdhani, Ahmed Amine Jerraya: MCI- Multilanguage Distributed Co- Simulation Tool. DIPES 1998: 191-202 | |
25 | EE | P. LeMarrec, Carlos A. Valderrama, F. Hessel, Ahmed Amine Jerraya, M. Attia, O. Cayrol: Hardware, Software and Mechanical Cosimulation for Automotive Applications. International Workshop on Rapid System Prototyping 1998: 202-206 |
1997 | ||
24 | EE | Clifford Liem, Marco Cornero, Miguel Santana, Pierre G. Paulin, Ahmed Amine Jerraya, Jean-Marc Gentit, Jean Lopez, Xavier Figari, Laurent Bergher: Am Embedded System Case Study: The Firm Ware Development Environment for a Multimedia Audio Processor. DAC 1997: 780-785 |
23 | EE | Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya: ReCode: the design and re-design of the instruction codes for embedded instruction-set processors. ED&TC 1997: 612 |
22 | EE | Gilberto Fernandes Marchioro, Jean-Marc Daveau, Ahmed Amine Jerraya: Transformational partitioning for co-design of multiprocessor systems. ICCAD 1997: 508-515 |
21 | EE | Clifford Liem, François Naçabal, Carlos A. Valderrama, Pierre G. Paulin, Ahmed Amine Jerraya: System-on-a-Chip Cosimulation and Compilation. IEEE Design & Test of Computers 14(2): 16-25 (1997) |
20 | EE | Jean-Marc Daveau, Gilberto Fernandes Marchioro, Tarek Ben Ismail, Ahmed Amine Jerraya: Protocol selection and interface generation for HW-SW codesign. IEEE Trans. VLSI Syst. 5(1): 136-144 (1997) |
19 | EE | Ahmed Amine Jerraya, Gert Goossens: Guest Editorial Introduction to the Special Issue on the Eighth IEEE International Symposium on System Synthesis. IEEE Trans. VLSI Syst. 5(1): 57-58 (1997) |
1996 | ||
18 | EE | Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens: Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. DAC 1996: 573-578 |
17 | EE | Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya: Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures. DAC 1996: 597-600 |
1995 | ||
16 | EE | Maher Rahmouni, Ahmed Amine Jerraya: Formulation and evaluation of scheduling techniques for control flow graphs. EURO-DAC 1995: 386-391 |
15 | EE | Polen Kission, Hong Ding, Ahmed Amine Jerraya: VHDL based design methodology for hierarchy and component re-use. EURO-DAC 1995: 470-475 |
14 | EE | M. Romdhani, P. Chambert, A. Jeffroy, P. de Chazelles, Ahmed Amine Jerraya: Composing ActivityCharts/StateCharts, SDL and SAO specifications for codesign in avionics. EURO-DAC 1995: 585-590 |
13 | EE | Jean-Marc Daveau, Tarek Ben Ismail, Ahmed Amine Jerraya: Synthesis of system-level communication by an allocation-based approach. ISSS 1995: 150-155 |
12 | EE | Clifford Liem, Pierre G. Paulin, Marco Cornero, Ahmed Amine Jerraya: Industrial experience using rule-driven retargetable code generation for multimedia applications. ISSS 1995: 60-68 |
11 | Tarek Ben Ismail, Ahmed Amine Jerraya: Synthesis Steps and Design Models for Codesign. IEEE Computer 28(2): 44-52 (1995) | |
1994 | ||
10 | EE | Tarek Ben Ismail, Mohamed Abid, Ahmed Amine Jerraya: COSMOS: a codesign approach for communicating systems. CODES 1994: 17-24 |
9 | EE | Markus Voss, Tarek Ben Ismail, Ahmed Amine Jerraya, Karl-Heinz Kapp: Towards a theory for hardware/software codesign. CODES 1994: 173-180 |
8 | EE | Polen Kission, Hong Ding, Ahmed Amine Jerraya: Structured Design Methodology for High-Level Design. DAC 1994: 466-471 |
7 | Tarek Ben Ismail, Kevin O'Brien, Ahmed Amine Jerraya: Interactive System-level Partitioning with PARTIF. EDAC-ETC-EUROASIC 1994: 464-468 | |
6 | Maher K. Rahmouni, Kevin O'Brien, Ahmed Amine Jerraya: A Loop-Based Scheduling Algorithm for Hardware Description Languages. Parallel Processing Letters 4: 351-364 (1994) | |
1993 | ||
5 | Ahmed Amine Jerraya, Kevin O'Brien, Tarek Ben Ismail: Linking System Design Tools and Hardware Design Tools. CHDL 1993: 345-351 | |
1992 | ||
4 | I. Park, Kevin O'Brien, Ahmed Amine Jerraya: AMICAL: Architectural Synthesis based on VHDL. Synthesis for Control Dominated Circuits 1992: 219-234 | |
1991 | ||
3 | Ahmed Amine Jerraya, Pierre G. Paulin, Simon Curry: Meta VHDL for Higher Level Controller Modeling and Synthesis. VLSI 1991: 215-224 | |
1990 | ||
2 | EE | P. Bondono, Ahmed Amine Jerraya, A. Hornik, Bernard Courtois, D. Bonifas: NAUTILE: a safe environment for silicon compilation. EURO-DAC 1990: 605-609 |
1986 | ||
1 | EE | Ahmed Amine Jerraya, P. Varinot, R. Jamier, Bernard Courtois: Principles of the SYCO compiler. DAC 1986: 715-721 |