| 2008 |
|---|
| 64 | EE | Ashoka Visweswara Sathanur,
Antonio Pullini,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Optimal sleep transistor synthesis under timing and area constraints.
ACM Great Lakes Symposium on VLSI 2008: 177-182 |
| 63 | EE | Ashoka Visweswara Sathanur,
Antonio Pullini,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
A Scalable Algorithmic Framework for Row-Based Power-Gating.
DATE 2008: 379-384 |
| 62 | EE | Ashoka Visweswara Sathanur,
Andrea Calimera,
Antonio Pullini,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
On quantifying the figures of merit of power-gating for leakage power minimization in nanometer CMOS circuits.
ISCAS 2008: 2761-2764 |
| 61 | EE | Ashoka Visweswara Sathanur,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Multiple power-gating domain (multi-VGND) architecture for improved leakage power reduction.
ISLPED 2008: 51-56 |
| 60 | EE | Ashoka Visweswara Sathanur,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating.
PATMOS 2008: 42-51 |
| 59 | EE | Ashutosh Chakraborty,
Karthik Duraisami,
Ashoka Visweswara Sathanur,
Prassanna Sithambaram,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers.
IEEE Trans. VLSI Syst. 16(6): 639-649 (2008) |
| 58 | EE | Ashutosh Chakraborty,
Karthik Duraisami,
Ashoka Visweswara Sathanur,
Prassanna Sithambaram,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations.
Integration 41(1): 2-8 (2008) |
| 2007 |
|---|
| 57 | EE | Andrea Calimera,
Antonio Pullini,
Ashoka Visweswara Sathanur,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology.
ACM Great Lakes Symposium on VLSI 2007: 501-504 |
| 56 | EE | Ashoka Visweswara Sathanur,
Andrea Calimera,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Interactive presentation: Efficient computation of discharge current upper bounds for clustered sleep transistor sizing.
DATE 2007: 1544-1549 |
| 55 | EE | Karthik Duraisami,
Prassanna Sithambaram,
Ashoka Visweswara Sathanur,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew.
ISCAS 2007: 1061-1064 |
| 54 | EE | Ashoka Visweswara Sathanur,
Antonio Pullini,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Timing-driven row-based power gating.
ISLPED 2007: 104-109 |
| 53 | EE | Prassanna Sithambaram,
Alberto Macii,
Enrico Macii:
New Adaptive Encoding Schemes for Switching Activity Balancing in On-Chip Buses.
PATMOS 2007: 232-241 |
| 2006 |
|---|
| 52 | EE | Ashutosh Chakraborty,
Prassanna Sithambaram,
Karthik Duraisami,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Thermal resilient bounded-skew clock tree optimization methodology.
DATE 2006: 832-837 |
| 51 | EE | Pietro Babighian,
Luca Benini,
Alberto Macii,
Enrico Macii:
Enabling fine-grain leakage management by voltage anchor insertion.
DATE 2006: 868-873 |
| 50 | EE | Ashutosh Chakraborty,
Karthik Duraisami,
Ashoka Visweswara Sathanur,
Prassanna Sithambaram,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits.
ISCAS 2006 |
| 49 | EE | Ashutosh Chakraborty,
Karthik Duraisami,
Ashoka Visweswara Sathanur,
Prassanna Sithambaram,
Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Dynamic thermal clock skew compensation using tunable delay buffers.
ISLPED 2006: 162-167 |
| 48 | EE | Ashutosh Chakraborty,
Karthik Duraisami,
Ashoka Visweswara Sathanur,
Prassanna Sithambaram,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective.
PATMOS 2006: 214-224 |
| 2005 |
|---|
| 47 | EE | Pietro Babighian,
Luca Benini,
Alberto Macii,
Enrico Macii:
Low-overhead state-retaining elements for low-leakage MTCMOS design.
ACM Great Lakes Symposium on VLSI 2005: 367-370 |
| 46 | EE | Prassanna Sithambaram,
Alberto Macii,
Enrico Macii:
Exploring the impact of architectural parameters on energy efficiency of application-specific block-enabled SRAMs.
ACM Great Lakes Symposium on VLSI 2005: 377-380 |
| 45 | EE | Prassanna Sithambaram,
Alberto Macii,
Enrico Macii:
Design and Implementation of a Memory Generator for Low-Energy Application-Specific Block-Enabled SRAMs.
PATMOS 2005: 477-487 |
| 44 | EE | Alberto Macii:
Low-power embedded systems.
J. Embedded Computing 1(3): 303-304 (2005) |
| 2004 |
|---|
| 43 | EE | Luca Benini,
Alessandro Ivaldi,
Alberto Macii,
Enrico Macii:
Block-Enabled Memory Macros: Design Space Exploration and Application-Specific Tuning.
DATE 2004: 698-699 |
| 42 | EE | Pietro Babighian,
Luca Benini,
Alberto Macii,
Enrico Macii:
Post-layout leakage power minimization based on distributed sleep transistor insertion.
ISLPED 2004: 138-143 |
| 41 | | Luca Benini,
Davide Bruni,
Alberto Macii,
Enrico Macii:
Memory energy minimization by data compression: algorithms, architectures and implementation.
IEEE Trans. VLSI Syst. 12(3): 255-268 (2004) |
| 2003 |
|---|
| 40 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Elvira Omerbegovic,
Massimo Poncino,
Fabrizio Pro:
A novel architecture for power maskable arithmetic units.
ACM Great Lakes Symposium on VLSI 2003: 136-140 |
| 39 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Elvira Omerbegovic,
Fabrizio Pro,
Massimo Poncino:
Energy-aware design techniques for differential power analysis protection.
DAC 2003: 36-41 |
| 38 | EE | Alberto Macii,
Enrico Macii,
Massimo Poncino:
Improving the Efficiency of Memory Partitioning by Address Clustering.
DATE 2003: 10018-10023 |
| 37 | EE | Alberto Macii,
Enrico Macii,
Fabrizio Crudo,
Roberto Zafalon:
A New Algorithm for Energy-Driven Data Compression in VLIW Embedded Processors.
DATE 2003: 10024-10029 |
| 36 | EE | Alberto Macii,
Enrico Macii,
Massimo Poncino:
Increasing the locality of memory access patterns by low-overhead hardware address relocation.
ISCAS (5) 2003: 385-388 |
| 35 | EE | Luca Benini,
Angelo Galati,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Energy-efficient data scrambling on memory-processor interfaces.
ISLPED 2003: 26-29 |
| 34 | EE | Luca Benini,
Davide Bruni,
Alberto Macii,
Enrico Macii:
Hardw are Implementation of Data Compression Algorithms for Memory Energy Optimization.
ISVLSI 2003: 250-251 |
| 33 | EE | Maurizio Bruno,
Alberto Macii,
Massimo Poncino:
A Statistic Power Model for Non-synthetic RTL Operators.
PATMOS 2003: 208-218 |
| 32 | EE | Luca Benini,
Alberto Macii,
Massimo Poncino:
Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques.
ACM Trans. Embedded Comput. Syst. 2(1): 5-32 (2003) |
| 31 | EE | Luca Benini,
Davide Bruni,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Discharge Current Steering for Battery Lifetime Optimization.
IEEE Trans. Computers 52(8): 985-995 (2003) |
| 30 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Scheduling battery usage in mobile systems.
IEEE Trans. VLSI Syst. 11(6): 1136-1143 (2003) |
| 2002 |
|---|
| 29 | EE | Monica Donno,
Luca Macchiarulo,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Enhanced clustered voltage scaling for low power.
ACM Great Lakes Symposium on VLSI 2002: 18-23 |
| 28 | EE | Luca Benini,
Davide Bruni,
Alberto Macii,
Enrico Macii:
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors.
DATE 2002: 449-450 |
| 27 | EE | Luca Benini,
Davide Bruni,
Bruno Riccò,
Alberto Macii,
Enrico Macii:
An adaptive data compression scheme for memory traffic minimization in processor-based systems.
ISCAS (4) 2002: 866-869 |
| 26 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Discharge current steering for battery lifetime optimization.
ISLPED 2002: 118-123 |
| 25 | EE | Luca Benini,
Alberto Macii,
Enrico Macii:
Offline Data Profiling Techniques to Enhance Memory Compression in Embedded Systems.
PATMOS 2002: 314-322 |
| 24 | EE | Luca Benini,
Luca Macchiarulo,
Alberto Macii,
Massimo Poncino:
Layout-driven memory synthesis for embedded systems-on-chip.
IEEE Trans. VLSI Syst. 10(2): 96-105 (2002) |
| 23 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Minimizing memory access energy in embedded systems by selective instruction compression.
IEEE Trans. VLSI Syst. 10(5): 521-531 (2002) |
| 2001 |
|---|
| 22 | EE | Luca Benini,
Luca Macchiarulo,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip.
DAC 2001: 784-789 |
| 21 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Extending lifetime of portable systems by battery scheduling.
DATE 2001: 197-203 |
| 20 | EE | Luca Benini,
Alberto Macii,
Alberto Nannarelli:
Cached-code compression for energy minimization in embedded processors.
ISLPED 2001: 322-327 |
| 19 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Riccardo Scarsi:
Battery-Driven Dynamic Power Management.
IEEE Design & Test of Computers 18(2): 53-60 (2001) |
| 18 | EE | Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Stream synthesis for efficient power simulation based on spectral transforms.
IEEE Trans. VLSI Syst. 9(3): 417-426 (2001) |
| 17 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Discrete-time battery models for system-level low-power design.
IEEE Trans. VLSI Syst. 9(5): 630-640 (2001) |
| 2000 |
|---|
| 16 | EE | Luca Benini,
Marco Ferrero,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Supporting system-level power exploration for DSP applications.
ACM Great Lakes Symposium on VLSI 2000: 17-22 |
| 15 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Synthesis of application-specific memories for power optimization in embedded systems.
DAC 2000: 300-303 |
| 14 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
A Discrete-Time Battery Model for High-Level Power Estimation.
DATE 2000: 35- |
| 13 | EE | Luca Benini,
Alberto Macii,
Massimo Poncino:
A recursive algorithm for low-power memory partitioning.
ISLPED 2000: 78-83 |
| 12 | EE | Luca Benini,
Giuliano Castelli,
Alberto Macii,
Enrico Macii,
Riccardo Scarsi:
Battery-Driven Dynamic Power Management of Portable Systems.
ISSS 2000: 25-33 |
| 11 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation.
IEEE Design & Test of Computers 17(2): 74-85 (2000) |
| 10 | EE | Luca Benini,
Giovanni De Micheli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Glitch power minimization by selective gate freezing.
IEEE Trans. VLSI Syst. 8(3): 287-298 (2000) |
| 9 | EE | Luca Benini,
Alberto Macii,
Massimo Poncino,
Riccardo Scarsi:
Architectures and synthesis algorithms for power-efficient businterfaces.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(9): 969-980 (2000) |
| 1999 |
|---|
| 8 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses.
DAC 1999: 128-133 |
| 7 | EE | Luca Benini,
Giovanni De Micheli,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Glitch Power Minimization by Gate Freezing.
DATE 1999: 163-167 |
| 6 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Region Compression: A New Scheme for Memory Energy Minimization in Embedded Systems.
EUROMICRO 1999: 1311-1317 |
| 5 | EE | Alberto Macii,
Enrico Macii,
Giuseppe Odasso,
Massimo Poncino,
Riccardo Scarsi:
Regression-Based Macromodeling for Delay Estimation of Behavioral Components.
Great Lakes Symposium on VLSI 1999: 188-191 |
| 4 | EE | Luca Benini,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Selective instruction compression for memory energy reduction in embedded systems.
ISLPED 1999: 206-211 |
| 1998 |
|---|
| 3 | EE | Luca Benini,
Giovanni De Micheli,
Alberto Macii,
Enrico Macii,
Massimo Poncino:
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding.
Great Lakes Symposium on VLSI 1998: 8-12 |
| 2 | EE | Fabrizio Ferrandi,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi,
Fabio Somenzi:
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits.
ICCAD 1998: 235-241 |
| 1 | EE | Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi:
Stream synthesis for efficient power simulation based on spectral transforms.
ISLPED 1998: 30-35 |
