2008 |
65 | EE | Kim Grüttner,
Frank Oppenheimer,
Wolfgang Nebel,
Fabien Colas-Bigey,
Anne-Marie Fouilliart:
SystemC-based Modelling, Seamless Refinement, and Synthesis of a JPEG 2000 Decoder.
DATE 2008: 128-133 |
64 | EE | Jan B. Freuer,
Goran Jerke,
Joachim Gerlach,
Wolfgang Nebel:
On the Verification of High-Order Constraint Compliance in IC Design.
DATE 2008: 26-31 |
63 | EE | Stefan Häusler,
Frank Poppen,
Kevin Hausmann,
Axel Hahn,
Wolfgang Nebel:
Qalitative and Quantitative Analysis of IC Designs.
DATE 2008: 935-936 |
62 | EE | Philipp A. Hartmann,
Henning Kleen,
Philipp Reinkemeier,
Wolfgang Nebel:
Efficient Modelling and Simulation of Embedded Software Multi-Tasking using SystemC and OSSS.
FDL 2008: 19-24 |
61 | EE | Kai Hylla,
Jan-Hendrik Oetjens,
Wolfgang Nebel:
Using SystemC for an Extended MATLAB/Simulink Verification Flow.
FDL 2008: 221-226 |
60 | EE | Markus Damm,
Christoph Grimm,
Jan Haase,
Andreas Herrholz,
Wolfgang Nebel:
Connecting SystemC-AMS Models with OSCI TLM 2.0 Models using Temporal Decoupling.
FDL 2008: 25-30 |
59 | EE | Kim Grüttner,
Wolfgang Nebel:
Modelling Program-State Machines in SystemC.
FDL 2008: 7-12 |
58 | EE | Andreas Schallenberg,
Achim Rettberg,
Wolfgang Nebel,
Franz-Josef Rammig:
Seamless design flow for reconfigurable systems.
FPL 2008: 351 |
57 | EE | Wolfgang Nebel,
Domenik Helms:
On leakage currents: sources and reduction for transistors, gates, memories and digital systems.
ISLPED 2008: 349-350 |
2007 |
56 | EE | Gila Kamhi,
Sarah Miller,
Stephen Bailey Mentor,
Wolfgang Nebel,
Y. C. Wong,
Juergen Karmann,
Enrico Macii,
Stephen V. Kosonocky,
Steve Curtis:
Early Power-Aware Design & Validation: Myth or Reality?
DAC 2007: 210-211 |
55 | EE | Claus Brunzema,
Wolfgang Nebel:
CSP with Synthesisable SystemC(tm) and OSSS.
FDL 2007: 116-121 |
54 | EE | Andreas Herrholz,
Frank Oppenheimer,
Philipp A. Hartmann,
Andreas Schallenberg,
Wolfgang Nebel,
Christoph Grimm,
Markus Damm,
Jan Haase,
F. Brame,
Fernando Herrera,
Eugenio Villar,
Ingo Sander,
Axel Jantsch,
Anne-Marie Fouilliart,
M. Martinez:
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems.
FPL 2007: 396-401 |
53 | EE | Domenik Helms,
Olaf Meyer,
Marko Hoyer,
Wolfgang Nebel:
Voltage- and ABB-island optimization in high level synthesis.
ISLPED 2007: 153-158 |
52 | EE | Marko Hoyer,
Domenik Helms,
Wolfgang Nebel:
Modelling the Impact of High Level Leakage Optimization Techniques on the Delay of RT-Components.
PATMOS 2007: 171-180 |
51 | EE | Sven Rosinger,
Domenik Helms,
Wolfgang Nebel:
RTL Power Modeling and Estimation of Sleep Transistor Based Power Gating.
PATMOS 2007: 278-287 |
50 | EE | Florian Dittmann,
Franz-Josef Rammig,
Martin Streubühr,
Christian Haubelt,
Andreas Schallenberg,
Wolfgang Nebel:
Exploration, Partitioning and Simulation of Reconfigurable Systems (Exploration, Partitionierung und Simulation rekonfigurierbarer Systeme).
it - Information Technology 49(3): 149- (2007) |
2006 |
49 | | Wolfgang Nebel,
Mircea R. Stan,
Anand Raghunathan,
Jörg Henkel,
Diana Marculescu:
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006
ACM 2006 |
48 | EE | Thorsten Schubert,
Wolfgang Nebel:
The Quiny SystemC Front End: Self-Synthesising Designs.
FDL 2006: 135-143 |
47 | EE | Andreas Schallenberg,
Wolfgang Nebel,
Frank Oppenheimer:
OSSS+R: Modelling and Simulating Self-Reconfigurable Systems.
FPL 2006: 1-6 |
46 | EE | Axel Reimer,
Arne Schulz,
Wolfgang Nebel:
Modelling macromodules for high-level dynamic power estimation of FPGA-based digital designs.
ISLPED 2006: 151-154 |
45 | EE | Domenik Helms,
Günter Ehmen,
Wolfgang Nebel:
Analysis and modeling of subthreshold leakage of RT-components under PTV and state variation.
ISLPED 2006: 220-225 |
44 | EE | Domenik Helms,
Marko Hoyer,
Wolfgang Nebel:
Accurate PTV, State, and ABB Aware RTL Blackbox Modeling of Subthreshold, Gate, and PN-Junction Leakage.
PATMOS 2006: 56-65 |
2005 |
43 | | Karsten Albers,
Carsten Beth,
Sven Frimont,
Nicole Kaczoreck,
Wolfgang Nebel,
Andreas Schallenberg,
Frank Slomka:
Smart Systems: Explorierende Roboter in der Lehre.
GI Jahrestagung (1) 2005: 173-177 |
42 | | Kim Grüttner,
Carsten Beth,
Wolfgang Nebel:
Kommunikationsgetriebene Hardware-/Software Partitionierung eines Netzwerkprotokoll-Stacks auf einer SoC Plattform.
GI Jahrestagung (1) 2005: 324-328 |
41 | | Arne Schulz,
Wolfgang Nebel:
Verlustleistungsabschätzung und -optimierung auf hohen Abstraktionsebenen: Modellierung von Funktionskomponenten und Leitungslängenabschätzung.
GI Jahrestagung (1) 2005: 454 |
40 | | Frank Oppenheimer,
Michael Kersten,
Wolfgang Nebel:
OOCOSIM - Eine objekt-orientierte Co-Designmethode für eingebettete Systeme.
GI Jahrestagung (2) 2005: 683-687 |
39 | EE | Arne Schulz,
Andreas Schallenberg,
Domenik Helms,
Milan Schulte,
Axel Reimer,
Wolfgang Nebel:
A High Level Constant Coefficient Multiplier Power Model for Power Estimation on High Levels of Abstraction.
PATMOS 2005: 146-155 |
38 | EE | Wolfgang Nebel,
Bärbel Mertsching,
Birger Kollmeier:
Digital Hearing Aids: Challenges and Solutions for Ultra Low Power.
PATMOS 2005: 733 |
37 | EE | Arne Schulz,
Wolfgang Nebel:
Optimization of Digital Audio Processing Algorithms Suitable for Hearing Aids.
PATMOS 2005: 735-736 |
2004 |
36 | EE | Wolfgang Nebel:
Predictable design of low power systems by pre-implementation estimation and optimization.
ASP-DAC 2004: 12-17 |
35 | EE | Thorsten Schubert,
Jürgen Hanisch,
Joachim Gerlach,
Jens-E. Appell,
Wolfgang Nebel:
Evaluation of a Refinement-Driven SystemC'-Based Design Flow.
DATE 2004: 262-267 |
34 | | Michael Kersten,
Wolfgang Nebel:
On Detecting Deadlocks in Large UML Models.
DIPES 2004: 11-20 |
33 | EE | Wolfgang Nebel:
System-Level Power Optimization.
DSD 2004: 27-34 |
32 | EE | Andreas Schallenberg,
Frank Oppenheimer,
Wolfgang Nebel:
Designing for dynamic partially reconfigurable FPGAs with SystemC and OSSS.
FDL 2004: 440-452 |
31 | EE | Domenik Helms,
Eike Schmidt,
Wolfgang Nebel:
Leakage in CMOS Circuits - An Introduction.
PATMOS 2004: 17-35 |
2003 |
30 | EE | Jan M. Rabaey,
Dennis Sylvester,
David Blaauw,
Kerry Bernstein,
Jerry Frenkil,
Mark Horowitz,
Wolfgang Nebel,
Takayasu Sakurai,
Andrew Yang:
Reshaping EDA for power.
DAC 2003: 15 |
29 | EE | M. Çakir,
Eike Grimpe,
Wolfgang Nebel:
HW-Driven Emulation with Automatic Interface Generation.
FPL 2003: 627-637 |
28 | EE | Ansgar Stammermann,
Domenik Helms,
Milan Schulte,
Arne Schulz,
Wolfgang Nebel:
Binding, Allocation and Floorplanning in Low Power High-Level Synthesis.
ICCAD 2003: 544-550 |
27 | EE | Ansgar Stammermann,
Domenik Helms,
Milan Schulte,
Arne Schulz,
Wolfgang Nebel:
Interconnect Driven Low Power High-Level Synthesis.
PATMOS 2003: 131-140 |
2002 |
26 | EE | Domenik Helms,
Eike Schmidt,
Arne Schulz,
Ansgar Stammermann,
Wolfgang Nebel:
An Improved Power Macro-Model for Arithmetic Datapath Components.
PATMOS 2002: 16-24 |
25 | EE | Eike Schmidt,
Gerd von Cölln,
Lars Kruse,
Frans Theeuwen,
Wolfgang Nebel:
Memory power models for multilevel power estimation and optimization.
IEEE Trans. VLSI Syst. 10(2): 106-109 (2002) |
2001 |
24 | EE | Frank Oppenheimer,
Dongming Zhang,
Wolfgang Nebel:
Modelling Communication Interfaces with COMIX.
Ada-Europe 2001: 337-348 |
23 | EE | Eike Schmidt,
Gerd Jochens,
Lars Kruse,
Frans Theeuwen,
Wolfgang Nebel:
Automatic nonlinear memory power modelling.
DATE 2001: 808 |
22 | | Ansgar Stammermann,
Lars Kruse,
Wolfgang Nebel,
Alexander Pratsch,
Eike Schmidt,
Milan Schulte,
Arne Schulz:
System level optimization and design space exploration for low power.
ISSS 2001: 142-146 |
21 | EE | Lars Kruse,
Eike Schmidt,
Gerd Jochens,
Ansgar Stammermann,
Arne Schulz,
Enrico Macii,
Wolfgang Nebel:
Estimation of lower and upper bounds on the power consumption from scheduled data flow graphs.
IEEE Trans. VLSI Syst. 9(1): 3-14 (2001) |
2000 |
20 | EE | Lars Kruse,
Eike Schmidt,
Gerd Jochens,
Ansgar Stammermann,
Wolfgang Nebel:
Lower Bounds on the Power Consumption in Scheduled Data Flow Graphs with Resource Constraints.
DATE 2000: 737 |
19 | EE | Lars Kruse,
Eike Schmidt,
Gerd Jochens,
Ansgar Stammermann,
Wolfgang Nebel:
Lower Bound Estimation for Low Power High-Level Synthesis.
ISSS 2000: 180-186 |
18 | EE | Gerd Jochens,
Lars Kruse,
Eike Schmidt,
Ansgar Stammermann,
Wolfgang Nebel:
Power Macro-Modelling for Firm-Macro.
PATMOS 2000: 24-35 |
17 | EE | Giulio Gorla,
Eduard Moser,
Wolfgang Nebel,
Eugenio Villar:
System Specification Experiments on a Common Benchmark.
IEEE Design & Test of Computers 17(3): 22-32 (2000) |
16 | EE | Hans-Jürgen Appelrath,
Werner Damm,
K.-H. Menke,
Wolfgang Nebel,
Wilfried Thoben:
OFFIS - Acht Jahre anwendungsorientierte Informatik-Forschung und -Entwicklung.
Inform., Forsch. Entwickl. 15(1): 51-61 (2000) |
1999 |
15 | EE | Gerd Jochens,
Lars Kruse,
Eike Schmidt,
Wolfgang Nebel:
A New Parameterizable Power Macro-Model for Datapath Components.
DATE 1999: 29- |
14 | EE | Martin Radetzki,
Ansgar Stammermann,
Wolfram Putzke-Röming,
Wolfgang Nebel:
Data Type Analysis for Hardware Synthesis from Object-Oriented Models.
DATE 1999: 491- |
13 | EE | Eduard Moser,
Wolfgang Nebel:
Case Study: System Model of Crane and Embedded Control.
DATE 1999: 721- |
12 | EE | Alexander Schwarz,
Bärbel Mertsching,
M. Brucke,
Wolfgang Nebel,
Jürgen Tchorz,
Birger Kollmeier:
Implementing a Quantitative Model for the "Effective" Signal Processing in the Auditory System on a Dedicated Digital VLSI Hardware.
EUROMICRO 1999: 1133-1139 |
11 | | M. Brucke,
Arne Schulz,
Wolfgang Nebel:
Auditory Signal Processing in Hardware: A Linear Gammatone Filterbank Design for a Model of the Auditory System.
FPL 1999: 11-20 |
10 | EE | Lars Kruse,
Eike Schmidt,
Gerd Jochens,
Wolfgang Nebel:
Lower and upper bounds on the switching activity in scheduled data flow graphs.
ISLPED 1999: 115-120 |
9 | | Laila Kabous,
Wolfgang Nebel:
Modeling Hard Real Time Systems with UML.
UML 1999: 339-355 |
1998 |
8 | | Alberto Allara,
Massimo Bombana,
Patrizia Cavalloro,
Wolfgang Nebel,
Wolfram Putzke-Röming,
Martin Radetzki:
ATM Cell Modelling using Objective VHDL.
ASP-DAC 1998: 261-264 |
7 | EE | Guido Schumacher,
Wolfgang Nebel:
How to Avoid the Inheritance Anomaly in Ada.
Ada-Europe 1998: 53-64 |
6 | EE | Guido Schumacher,
Wolfgang Nebel:
Object-Oriented Modelling of Parallel Hardware Systems.
DATE 1998: 234-241 |
5 | EE | Wolfram Putzke-Röming,
Martin Radetzki,
Wolfgang Nebel:
A Flexible Message Passing Mechanism for Objective VHDL.
DATE 1998: 242-249 |
4 | EE | Dirk Rabe,
Gerd Jochens,
Lars Kruse,
Wolfgang Nebel,
Carl von Ossietzky:
Power-Simulation of Cell Based ASICs: Accuracy- and Performance Trade-Offs.
DATE 1998: 356-361 |
3 | EE | Martin Radetzki,
Wolfram Putzke-Röming,
Wolfgang Nebel:
A Unified Approach to Object-Oriented VHDL.
J. Inf. Sci. Eng. 14(3): 523-545 (1998) |
1996 |
2 | EE | Dirk Rabe,
Wolfgang Nebel:
Short circuit power consumption of glitches.
ISLPED 1996: 125-128 |
1995 |
1 | EE | Guido Schumacher,
Wolfgang Nebel:
Inheritance concept for signals in object-oriented extensions to VHDL.
EURO-DAC 1995: 428-435 |