2009 |
29 | EE | Mihir R. Choudhury,
Kartik Mohanram:
Reliability Analysis of Logic Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 392-405 (2009) |
2008 |
28 | EE | Mihir R. Choudhury,
Youngki Yoon,
Jing Guo,
Kartik Mohanram:
Technology exploration for graphene nanoribbon FETs.
DAC 2008: 272-277 |
27 | EE | Mihir R. Choudhury,
Kartik Mohanram:
Approximate logic circuits for low overhead, non-intrusive concurrent error detection.
DATE 2008: 903-908 |
26 | EE | Kartik Mohanram:
Error Detection and Tolerance for Scaled Electronic Technologies.
DFT 2008: 83-83 |
25 | EE | Kartik Mohanram,
Jing Guo:
Graphene nanoribbon FETs: technology exploration and CAD.
ICCAD 2008: 412-415 |
2007 |
24 | EE | Mihir R. Choudhury,
Kyle Ringgenberg,
Scott Rixner,
Kartik Mohanram:
Interactive presentation: Single-ended coding techniques for off-chip interconnects to commodity memory.
DATE 2007: 1072-1077 |
23 | EE | Mihir R. Choudhury,
Kartik Mohanram:
Accurate and scalable reliability analysis of logic circuits.
DATE 2007: 1454-1459 |
22 | EE | Kai Sun,
Quming Zhou,
Kartik Mohanram,
Danny C. Sorensen:
Parallel domain decomposition for simulation of large-scale power grids.
ICCAD 2007: 54-59 |
21 | EE | Quming Zhou,
Lin Zhong,
Kartik Mohanram:
Power signal processing: a new perspective for power analysis and optimization.
ISLPED 2007: 165-170 |
20 | EE | Mosin Mondal,
Kartik Mohanram,
Yehia Massoud:
Parameter-Variation-Aware Analysis for Noise Robustness.
ISQED 2007: 655-659 |
2006 |
19 | EE | Alan L. Cox,
Kartik Mohanram,
Scott Rixner:
Dependable != unaffordable.
ASID 2006: 58-62 |
18 | EE | Quming Zhou,
Kartik Mohanram:
Elmore model for energy estimation in RC trees.
DAC 2006: 965-970 |
17 | EE | Quming Zhou,
Kai Sun,
Kartik Mohanram,
Danny C. Sorensen:
Large power grid analysis using domain decomposition.
DATE 2006: 27-32 |
16 | EE | Mihir R. Choudhury,
Quming Zhou,
Kartik Mohanram:
Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques.
ICCAD 2006: 204-209 |
15 | EE | Quming Zhou,
Mihir R. Choudhury,
Kartik Mohanram:
Design Optimization for Robustness to Single Event Upsets.
VTS 2006: 202-207 |
14 | EE | Quming Zhou,
Kartik Mohanram:
Gate sizing to radiation harden combinational logic.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 155-166 (2006) |
2005 |
13 | EE | Quming Zhou,
Kartik Mohanram,
Athanasios C. Antoulas:
Structure preserving reduction of frequency-dependent interconnect.
DAC 2005: 939-942 |
12 | EE | Kartik Mohanram:
Closed-Form Simulation and Robustness Models for SEU-Tolerant Design.
VTS 2005: 327-333 |
2004 |
11 | EE | Quming Zhou,
Kartik Mohanram:
Cost-effective radiation hardening technique for combinational logic.
ICCAD 2004: 100-106 |
10 | EE | Quming Zhou,
Kartik Mohanram:
Analysis of delay caused by bridging faults in RLC interconnects.
ITC 2004: 1044-1052 |
9 | EE | Kartik Mohanram,
Scott Rixner:
Context-Independent Codes for Off-Chip Interconnects.
PACS 2004: 107-119 |
8 | EE | Kartik Mohanram,
Nur A. Touba:
Lowering power consumption in concurrent checkers via input ordering.
IEEE Trans. VLSI Syst. 12(11): 1234-1243 (2004) |
2003 |
7 | EE | Kartik Mohanram,
Nur A. Touba:
Partial Error Masking to Reduce Soft Error Failure Rate in Logic Circuits.
DFT 2003: 433- |
6 | EE | Kartik Mohanram,
Egor S. Sogomonyan,
Michael Gössel,
Nur A. Touba:
Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits.
IOLTS 2003: 35- |
5 | EE | Kartik Mohanram,
Nur A. Touba:
Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic Circuits.
ITC 2003: 893-901 |
4 | EE | Kartik Mohanram,
Nur A. Touba:
Eliminating Non-Determinism During Test of High-Speed Source Synchronous Differential Buses.
VTS 2003: 121-127 |
2002 |
3 | EE | Kartik Mohanram,
Nur A. Touba:
Input Ordering in Concurrent Checkers to Reduce Power Consumption.
DFT 2002: 87-98 |
2 | EE | Kartik Mohanram,
C. V. Krishna,
Nur A. Touba:
A methodology for automated insertion of concurrent error detection hardware in synthesizable Verilog RTL.
ISCAS (1) 2002: 577-580 |
1999 |
1 | EE | Abhijit Jas,
Kartik Mohanram,
Nur A. Touba:
An Embedded Core DFT Scheme to Obtain Highly Compressed Test Sets.
Asian Test Symposium 1999: 275- |