| |
| 2009 | ||
|---|---|---|
| 2 | EE | Po-Yang Hsu, Shu-Ting Lee, Fu-Wei Chen, Yi-Yu Liu: Buffer design and optimization for lut-based structured ASIC design styles. ACM Great Lakes Symposium on VLSI 2009: 377-380 |
| 2008 | ||
| 1 | EE | Fu-Wei Chen, Yi-Yu Liu: Wire Sizing Alternative - An Uniform Dual-rail Routing Architecture. DATE 2008: 796-799 |
| 1 | Po-Yang Hsu | [2] |
| 2 | Shu-Ting Lee | [2] |
| 3 | Yi-Yu Liu | [1] [2] |