2008 |
20 | EE | Faizal Arya Samman,
Thomas Hollstein,
Manfred Glesner:
Multicast Parallel Pipeline Router Architecture for Network-on-Chip.
DATE 2008: 1396-1401 |
19 | EE | Faizal Arya Samman,
Thomas Hollstein,
Manfred Glesner:
Flexible parallel pipeline network-on-chip based on dynamic packet identity management.
IPDPS 2008: 1-8 |
18 | EE | Manfred Glesner,
Tudor Murgan,
Thomas Hollstein:
Hardware Based Rapid Prototyping.
Wiley Encyclopedia of Computer Science and Engineering 2008 |
2007 |
17 | EE | Thomas Hollstein,
Manfred Glesner:
Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms.
Computers & Electrical Engineering 33(4): 310-319 (2007) |
2005 |
16 | | Gilles Sassatelli,
Manfred Glesner,
Lionel Torres,
Leandro Soares Indrusiak,
Thomas Hollstein:
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005
Univ. Montpellier II 2005 |
15 | | Martin K. F. Schafer,
Thomas Hollstein,
Heiko Zimmer,
Manfred Glesner:
Deadlock-free routing and component placement for irregular mesh-based networks-on-chip.
ICCAD 2005: 238-245 |
14 | EE | Heiko Zimmer,
Stefan Zink,
Thomas Hollstein,
Manfred Glesner:
Buffer-Architecture Exploration for Routers in a Hierarchical Network-on-Chip.
IPDPS 2005 |
13 | | Thomas Hollstein,
Sujan Pandey,
Manfred Glesner:
Advanced On-Chip Communication Architectures and Routing Methods for Systems-on-Chip.
ReCoSoC 2005: 85-92 |
12 | EE | Manfred Glesner,
Heiko Hinkelmann,
Thomas Hollstein,
Leandro Soares Indrusiak,
Tudor Murgan,
Abdulfattah Mohammad Obeid,
Mihail Petrov,
Thilo Pionteck,
Peter Zipf:
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques.
SAMOS 2005: 12-21 |
2004 |
11 | EE | Manfred Glesner,
Thomas Hollstein,
Leandro Soares Indrusiak,
Peter Zipf,
Thilo Pionteck,
Mihail Petrov,
Heiko Zimmer,
Tudor Murgan:
Reconfigurable platforms for ubiquitous computing.
Conf. Computing Frontiers 2004: 377-389 |
10 | EE | Ralf Ludewig,
Thomas Hollstein,
Falko Schütz,
Manfred Glesner:
Rapid Prototyping of an Integrated Testing and Debugging Unit.
IEEE International Workshop on Rapid System Prototyping 2004: 187-192 |
2003 |
9 | EE | Tudor Murgan,
Mihail Petrov,
Alberto García Ortiz,
Ralf Ludewig,
Peter Zipf,
Thomas Hollstein,
Manfred Glesner,
Bernard Ölkrug,
Jörg Brakensiek:
Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures.
FPL 2003: 1111-1114 |
8 | | Thomas Hollstein,
Ralf Ludewig,
Christoph Mager,
Peter Zipf,
Manfred Glesner:
A hierarchical generic approach for on-chip communication, testing and debugging of SoCs.
VLSI-SOC 2003: 44-49 |
2002 |
7 | EE | André Schneider,
Karl-Heinz Diener,
Eero Ivask,
Raimund Ubar,
Elena Gramatová,
Thomas Hollstein,
Wieslaw Kuzmicz,
Zebo Peng:
Integrated Design and Test Generation Under Internet Based Environment MOSCITO.
DSD 2002: 187-195 |
2001 |
6 | EE | Jochen Mades,
T. Schneider,
A. Windisch,
Thomas Hollstein,
Jürgen Becker,
Manfred Glesner:
Concept of a Joint University/Industry Course for Mixed-Signal System-On-Chip Design.
MSE 2001: 2-3 |
1998 |
5 | EE | Thomas Hollstein,
Jürgen Becker,
Andreas Kirschbaum,
Manfred Glesner:
HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems.
CODES 1998: 29-33 |
4 | EE | Claus Schneider,
Martin Kayss,
Thomas Hollstein,
Jürgen Deicke:
From Algorithms to Hardware Architectures: A Comparison of Regular and Irregular Structured IDCT Algorithms.
DATE 1998: 186-190 |
1997 |
3 | | Thomas Hollstein,
Andreas Kirschbaum,
Manfred Glesner:
A prototyping environment for fuzzy controllers.
FPL 1997: 482-490 |
1995 |
2 | | U. Zahm,
Thomas Hollstein,
Hans-Jürgen Herpel,
Norbert Wehn,
Manfred Glesner:
Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit.
FPL 1995: 241-250 |
1994 |
1 | | Thomas Hollstein,
Saman K. Halgamuge,
Andreas Kirschbaum,
Manfred Glesner:
Rapid-Prototyping von anwendungsspezifischen Fuzzy Controllern mit Field Programmable Gate Arrays.
Fuzzy Days 1994: 8-14 |