2008 |
32 | EE | Anders Larsson,
Erik Larsson,
Krishnendu Chakrabarty,
Petru Eles,
Zebo Peng:
Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns.
DATE 2008: 188-193 |
31 | EE | Soheil Samii,
Mikko Selkälä,
Erik Larsson,
Krishnendu Chakrabarty,
Zebo Peng:
Cycle-Accurate Test Power Modeling and Its Application to SoC Test Architecture Design and Scheduling.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 973-977 (2008) |
30 | EE | Erik Larsson,
Zebo Peng:
A Reconfigurable Power Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling.
J. Electronic Testing 24(5): 497-504 (2008) |
2007 |
29 | EE | Erik Larsson,
Jon Persson:
An Architecture for Combined Test Data Compression and Abort-on-Fail Test.
ASP-DAC 2007: 726-731 |
28 | EE | Anders Larsson,
Erik Larsson,
Petru Eles,
Zebo Peng:
Optimized integration of test compression and sharing for SOC testing.
DATE 2007: 207-212 |
27 | EE | Tobias Dubois,
Erik Jan Marinissen,
Mohamed Azimane,
Paul Wielage,
Erik Larsson,
Clemens Wouters:
Test quality analysis and improvement for an embedded asynchronous FIFO.
DATE 2007: 859-864 |
26 | | Anders Larsson,
Erik Larsson,
Petru Eles,
Zebo Peng:
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing.
DDECS 2007: 61-66 |
25 | EE | Erik Larsson,
Mehdi Amirijoo,
Daniel Karlsson,
Petru Eles:
What impacts course evaluation?
ITiCSE 2007: 333 |
2006 |
24 | EE | Erik Larsson,
Zebo Peng:
Power-Aware Test Planning in the Early System-on-Chip Design Exploration Process.
IEEE Trans. Computers 55(2): 227-239 (2006) |
23 | EE | Erik Larsson,
Hideo Fujiwara:
System-on-chip test scheduling with reconfigurable core wrappers.
IEEE Trans. VLSI Syst. 14(3): 305-309 (2006) |
2005 |
22 | EE | Anders Larsson,
Erik Larsson,
Petru Eles,
Zebo Peng:
SOC Test Scheduling with Test Set Sharing and Broadcasting.
Asian Test Symposium 2005: 162-169 |
21 | EE | Anders Larsson,
Erik Larsson,
Petru Eles,
Zebo Peng:
Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip.
DSD 2005: 403-411 |
20 | EE | Erik Larsson,
Stina Edbom:
Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint.
VLSI-SoC 2005: 221-244 |
19 | EE | Julien Pouget,
Erik Larsson,
Zebo Peng:
Multiple-Constraint Driven System-on-Chip Test Time Optimization.
J. Electronic Testing 21(6): 599-611 (2005) |
18 | EE | Erik Larsson,
Julien Pouget,
Zebo Peng:
Abort-on-Fail Based Test Scheduling.
J. Electronic Testing 21(6): 651-658 (2005) |
2004 |
17 | EE | Stina Edbom,
Erik Larsson:
An Integrated Technique for Test Vector Selection and Test Scheduling under Test Time Constraint.
Asian Test Symposium 2004: 254-257 |
16 | EE | Erik Larsson:
Integrating Core Selection in the SOC Test Solution Design-Flow.
ITC 2004: 1349-1358 |
15 | EE | Erik Larsson,
Anders Larsson:
Student-oriented examination in a computer architecture course.
ITiCSE 2004: 245 |
14 | EE | Erik Larsson,
Julien Pouget,
Zebo Peng:
Defect-Aware SOC Test Scheduling.
VTS 2004: 361-366 |
13 | EE | Erik Larsson,
Klas Arvidsson,
Hideo Fujiwara,
Zebo Peng:
Efficient test solutions for core-based designs.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(5): 758-775 (2004) |
2003 |
12 | EE | Erik Larsson,
Hideo Fujiwara:
Optimal System-on-Chip Test Scheduling.
Asian Test Symposium 2003: 306-311 |
11 | EE | Julien Pouget,
Erik Larsson,
Zebo Peng:
SOC Test Time Minimization Under Multiple Constraints.
Asian Test Symposium 2003: 312-317 |
10 | EE | Anders Larsson,
Erik Larsson,
Petru Eles,
Zebo Peng:
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip.
DFT 2003: 385-392 |
9 | EE | Erik Larsson,
Zebo Peng:
A Reconfigurable Power-Conscious Core Wrapper and its Application to SOC Test Scheduling.
ITC 2003: 1135-1144 |
8 | EE | Erik Larsson,
Hideo Fujiwara:
Test Resource Partitioning and Optimization for SOC Designs.
VTS 2003: 319-324 |
2002 |
7 | EE | Erik Larsson,
Klas Arvidsson,
Hideo Fujiwara,
Zebo Peng:
Integrated Test Scheduling, Test Parallelization and TAMDesign.
Asian Test Symposium 2002: 397-404 |
6 | EE | Erik Larsson,
Zebo Peng:
An Integrated Framework for the Design and Optimization of SOC Test Solutions.
J. Electronic Testing 18(4-5): 385-400 (2002) |
2001 |
5 | EE | Erik Larsson,
Zebo Peng:
Test Scheduling and Scan-Chain Division under Power Constraint.
Asian Test Symposium 2001: 259-264 |
4 | EE | Erik Larsson,
Zebo Peng:
An integrated system-on-chip test framework.
DATE 2001: 138-144 |
3 | EE | Erik Larsson,
Zebo Peng,
Gunnar Carlsson:
The Design and Optimization of SOC Test Solutions.
ICCAD 2001: 523-530 |
2000 |
2 | | John Saul,
Betsy Black,
Erik Larsson:
Helpdesk.Drew.Edu: Home Growing a Helpdesk Solution Using Open-Source Technology.
SIGUCCS 2000: 289-293 |
1997 |
1 | EE | Xinli Gu,
Erik Larsson,
Krzysztof Kuchcinski,
Zebo Peng:
A controller testability analysis and enhancement technique.
ED&TC 1997: 153-157 |