2009 |
30 | EE | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
Efficient partial scan cell gating for low-power scan-based testing.
ACM Trans. Design Autom. Electr. Syst. 14(2): (2009) |
2008 |
29 | EE | V. Tenentes,
Xrysovalantis Kavousianos,
Emmanouil Kalligeros:
State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores.
DATE 2008: 474-479 |
28 | EE | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Multilevel-Huffman Test-Data Compression for IP Cores With Multiple Scan Chains.
IEEE Trans. VLSI Syst. 16(7): 926-931 (2008) |
27 | EE | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Test Data Compression Based on Variable-to-Variable Huffman Encoding With Codeword Reusability.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1333-1338 (2008) |
2007 |
26 | EE | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Optimal Selective Huffman Coding for Test-Data Compression.
IEEE Trans. Computers 56(8): 1146-1152 (2007) |
25 | EE | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Multilevel Huffman Coding: An Efficient Test-Data Compression Method for IP Cores.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1070-1083 (2007) |
2006 |
24 | EE | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Efficient test-data compression for IP cores using multilevel Huffman coding.
DATE 2006: 1033-1038 |
23 | EE | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
Efficient Multiphase Test Set Embedding for Scan-based Testing.
ISQED 2006: 433-438 |
2005 |
22 | EE | Emmanouil Kalligeros,
D. Kaseridis,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
Reseeding-Based Test Set Embedding with Reduced Test Sequences.
ISQED 2005: 226-231 |
2004 |
21 | EE | Maciej Bellos,
Dimitris Bakalis,
Dimitris Nikolos,
Xrysovalantis Kavousianos:
Low Power Testing by Test Vector Ordering with Vector Repetition.
ISQED 2004: 205-210 |
20 | EE | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Maciej Bellos,
Dimitris Nikolos:
An Efficient Test Vector Ordering Method for Low Power Testing.
ISVLSI 2004: 285-288 |
19 | EE | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
Multiphase BIST: a new reseeding technique for high test-data compression.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1429-1446 (2004) |
2003 |
18 | EE | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
A highly regular multi-phase reseeding technique for scan-based BIST.
ACM Great Lakes Symposium on VLSI 2003: 295-298 |
17 | EE | Giorgos Dimitrakopoulos,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
Virtual-scan: a novel approach for software-based self-testing of microprocessors.
ISCAS (5) 2003: 237-240 |
16 | | Maciej Bellos,
Xrysovalantis Kavousianos,
Dimitris Nikolos,
Dimitri Kagaris:
DV-TSE: Difference Vector Based Test Set Embedding.
VLSI-SOC 2003: 343- |
2002 |
15 | EE | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
A ROMless LFSR Reseeding Scheme for Scan-based BIST.
Asian Test Symposium 2002: 206- |
14 | EE | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
An Efficient Seeds Selection Method for LFSR-Based Test-per-Clock BIST.
ISQED 2002: 261-266 |
13 | EE | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos,
Spyros Tragoudas:
A new built-in TPG method for circuits with random patternresistant faults.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(7): 859-866 (2002) |
12 | EE | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST.
J. Electronic Testing 18(3): 315-332 (2002) |
2001 |
11 | EE | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
A novel reseeding technique for accumulator-based test pattern generation.
ACM Great Lakes Symposium on VLSI 2001: 7-12 |
10 | EE | Stanislaw J. Piestrak,
Dimitris Bakalis,
Xrysovalantis Kavousianos:
On the Design of Self-Testing Checkers for Modified Berger Codes.
IOLTW 2001: 153-157 |
9 | EE | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
A New Reseeding Technique for LFSR-Based Test Pattern Generation.
IOLTW 2001: 80-86 |
8 | EE | Dimitris Bakalis,
Dimitris Nikolos,
Haridimos T. Vergos,
Xrysovalantis Kavousianos:
On Accumulator-Based Bit-Serial Test Response Compaction Schemes.
ISQED 2001: 350- |
2000 |
7 | | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
Test response compaction by an accumulator behaving as a multiple input non-linear feedback shift register.
ITC 2000: 804-811 |
1999 |
6 | EE | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Haridimos T. Vergos,
Dimitris Nikolos,
George Alexiou:
Low Power Dissipation in BIST Schemes for Modified Booth Multipliers.
DFT 1999: 121-129 |
5 | EE | Xrysovalantis Kavousianos,
Dimitris Nikolos:
Modular TSC Checkers for Bose-Lin and Bose Codes.
VTS 1999: 354-360 |
4 | EE | Xrysovalantis Kavousianos,
Dimitris Nikolos,
G. Foukarakis,
T. Gnardellis:
New efficient totally self-checking Berger code checkers.
Integration 28(1): 101-118 (1999) |
1998 |
3 | EE | Xrysovalantis Kavousianos,
Dimitris Nikolos:
Novel Single and Double Output TSC Berger Code Checkers.
VTS 1998: 348-353 |
1997 |
2 | EE | Xrysovalantis Kavousianos,
Dimitris Nikolos,
G. Sidiropoulos:
Design of Compact and High speed, Totally Self Checking CMOS Checkers for m-out-of-n Codes.
DFT 1997: 128-136 |
1 | EE | Xrysovalantis Kavousianos,
Dimitris Nikolos:
Self-exercising self testing k-order comparators.
VTS 1997: 216-221 |