2008 |
4 | EE | R. Arteaga,
Félix Tobajas,
Roberto Esper-Chaín,
V. de Armas,
Roberto Sarmiento:
GMDS: Hardware implementation of novel real output queuing architecture.
DATE 2008: 1450-1455 |
2006 |
3 | | Félix Tobajas,
Roberto Esper-Chaín,
Raúl Regidor,
O. Santana,
Roberto Sarmiento:
A Low Power 2.5 Gbps 1: 32 Deserializer in SiGe BiCMOS Technology.
DDECS 2006: 21-26 |
2005 |
2 | EE | Félix Tobajas,
Roberto Esper-Chaín,
S. Tubio,
R. Arteaga,
V. de Armas,
Roberto Sarmiento:
Experimental gigabit multidrop serial backplane for high speed digital systems.
ISCAS (4) 2005: 3821-3824 |
1998 |
1 | EE | Carmen N. Ojeda-Guerra,
Roberto Esper-Chaín,
M. Estupiñán,
Elsa M. Macías,
Álvaro Suárez:
Hardware Mapping of a Parallel Algorithm for Matrix-Vector Multiplication Overlapping Communications and Computations.
FPL 1998: 396-400 |