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Roberto Esper-Chaín

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2008
4EER. Arteaga, Félix Tobajas, Roberto Esper-Chaín, V. de Armas, Roberto Sarmiento: GMDS: Hardware implementation of novel real output queuing architecture. DATE 2008: 1450-1455
2006
3 Félix Tobajas, Roberto Esper-Chaín, Raúl Regidor, O. Santana, Roberto Sarmiento: A Low Power 2.5 Gbps 1: 32 Deserializer in SiGe BiCMOS Technology. DDECS 2006: 21-26
2005
2EEFélix Tobajas, Roberto Esper-Chaín, S. Tubio, R. Arteaga, V. de Armas, Roberto Sarmiento: Experimental gigabit multidrop serial backplane for high speed digital systems. ISCAS (4) 2005: 3821-3824
1998
1EECarmen N. Ojeda-Guerra, Roberto Esper-Chaín, M. Estupiñán, Elsa M. Macías, Álvaro Suárez: Hardware Mapping of a Parallel Algorithm for Matrix-Vector Multiplication Overlapping Communications and Computations. FPL 1998: 396-400

Coauthor Index

1V. de Armas [2] [4]
2R. Arteaga [2] [4]
3M. Estupiñán [1]
4Elsa María Macías López (Elsa M. Macías) [1]
5Carmen N. Ojeda-Guerra [1]
6Raúl Regidor [3]
7O. Santana [3]
8Álvaro Suárez Sarmiento (Álvaro Suárez) [1]
9Roberto Sarmiento [2] [3] [4]
10Félix Tobajas [2] [3] [4]
11S. Tubio [2]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)