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Piet Engelke

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2009
15EEAlejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker: TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis. VLSI Design 2009: 227-232
2008
14EEPiet Engelke, Ilia Polian, Jürgen Schlöffel, Bernd Becker: Resistive Bridging Fault Simulation of Industrial Circuits. DATE 2008: 628-633
13EEIlia Polian, Kohei Miyase, Yusuke Nakamura, Seiji Kajihara, Piet Engelke, Bernd Becker, Stefan Spinner, Xiaoqing Wen: Diagnosis of Realistic Defects Based on the X-Fault Model. DDECS 2008: 263-266
12EEStefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng: Automatic Test Pattern Generation for Interconnect Open Defects. VTS 2008: 181-186
11EEPiet Engelke, Ilia Polian, Michel Renovell, Sandip Kundu, Bharath Seshadri, Bernd Becker: On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 327-338 (2008)
2006
10EEYuyi Tang, Hans-Joachim Wunderlich, Piet Engelke, Ilia Polian, Bernd Becker, Jürgen Schlöffel, Friedrich Hapke, Michael Wittke: X-masking during logic BIST and its impact on defect coverage. IEEE Trans. VLSI Syst. 14(2): 193-202 (2006)
9EEPiet Engelke, Ilia Polian, Michel Renovell, Bernd Becker: Simulating Resistive-Bridging and Stuck-At Faults. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2181-2192 (2006)
8EEPiet Engelke, Ilia Polian, Michel Renovell, Bernd Becker: Automatic Test Pattern Generation for Resistive Bridging Faults. J. Electronic Testing 22(1): 61-69 (2006)
2005
7EESandip Kundu, Piet Engelke, Ilia Polian, Bernd Becker: On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. Asian Test Symposium 2005: 266-271
6EEIlia Polian, Sandip Kundu, Jean Marc Gallière, Piet Engelke, Michel Renovell, Bernd Becker: Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies. VTS 2005: 343-348
5EEIlia Polian, Piet Engelke, Michel Renovell, Bernd Becker: Modeling Feedback Bridging Faults with Non-Zero Resistance. J. Electronic Testing 21(1): 57-69 (2005)
2004
4EEYuyi Tang, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Piet Engelke, Ilia Polian, Bernd Becker: X-Masking During Logic BIST and Its Impact on Defect Coverage. ITC 2004: 442-451
3EEPiet Engelke, Ilia Polian, Michel Renovell, Bharath Seshadri, Bernd Becker: The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults. VTS 2004: 171-178
2003
2EEPiet Engelke, Ilia Polian, Michel Renovell, Bernd Becker: Simulating Resistive Bridging and Stuck-At Faults. ITC 2003: 1051-1059
2002
1EEIlia Polian, Piet Engelke, Bernd Becker: Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics. ISMVL 2002: 216-

Coauthor Index

1Bernd Becker [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
2Wu-Tung Cheng [12]
3Alejandro Czutro [15]
4Jean Marc Gallière [6]
5Friedrich Hapke [4] [10]
6Seiji Kajihara [13]
7Martin Keim [12]
8Sandip Kundu [6] [7] [11]
9Matthew Lewis [15]
10Kohei Miyase [13]
11Yusuke Nakamura [13]
12Ilia Polian [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
13Sudhakar M. Reddy [15]
14Michel Renovell [2] [3] [5] [6] [8] [9] [11]
15Jürgen Schlöffel [10] [14]
16Bharath Seshadri [3] [11]
17Stefan Spinner [12] [13]
18Yuyi Tang [4] [10]
19Harald P. E. Vranken [4]
20Xiaoqing Wen [13]
21Michael Wittke [4] [10]
22Hans-Joachim Wunderlich [4] [10]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)