2009 |
15 | EE | Alejandro Czutro,
Ilia Polian,
Matthew Lewis,
Piet Engelke,
Sudhakar M. Reddy,
Bernd Becker:
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis.
VLSI Design 2009: 227-232 |
2008 |
14 | EE | Piet Engelke,
Ilia Polian,
Jürgen Schlöffel,
Bernd Becker:
Resistive Bridging Fault Simulation of Industrial Circuits.
DATE 2008: 628-633 |
13 | EE | Ilia Polian,
Kohei Miyase,
Yusuke Nakamura,
Seiji Kajihara,
Piet Engelke,
Bernd Becker,
Stefan Spinner,
Xiaoqing Wen:
Diagnosis of Realistic Defects Based on the X-Fault Model.
DDECS 2008: 263-266 |
12 | EE | Stefan Spinner,
Ilia Polian,
Piet Engelke,
Bernd Becker,
Martin Keim,
Wu-Tung Cheng:
Automatic Test Pattern Generation for Interconnect Open Defects.
VTS 2008: 181-186 |
11 | EE | Piet Engelke,
Ilia Polian,
Michel Renovell,
Sandip Kundu,
Bharath Seshadri,
Bernd Becker:
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 327-338 (2008) |
2006 |
10 | EE | Yuyi Tang,
Hans-Joachim Wunderlich,
Piet Engelke,
Ilia Polian,
Bernd Becker,
Jürgen Schlöffel,
Friedrich Hapke,
Michael Wittke:
X-masking during logic BIST and its impact on defect coverage.
IEEE Trans. VLSI Syst. 14(2): 193-202 (2006) |
9 | EE | Piet Engelke,
Ilia Polian,
Michel Renovell,
Bernd Becker:
Simulating Resistive-Bridging and Stuck-At Faults.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2181-2192 (2006) |
8 | EE | Piet Engelke,
Ilia Polian,
Michel Renovell,
Bernd Becker:
Automatic Test Pattern Generation for Resistive Bridging Faults.
J. Electronic Testing 22(1): 61-69 (2006) |
2005 |
7 | EE | Sandip Kundu,
Piet Engelke,
Ilia Polian,
Bernd Becker:
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing.
Asian Test Symposium 2005: 266-271 |
6 | EE | Ilia Polian,
Sandip Kundu,
Jean Marc Gallière,
Piet Engelke,
Michel Renovell,
Bernd Becker:
Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies.
VTS 2005: 343-348 |
5 | EE | Ilia Polian,
Piet Engelke,
Michel Renovell,
Bernd Becker:
Modeling Feedback Bridging Faults with Non-Zero Resistance.
J. Electronic Testing 21(1): 57-69 (2005) |
2004 |
4 | EE | Yuyi Tang,
Hans-Joachim Wunderlich,
Harald P. E. Vranken,
Friedrich Hapke,
Michael Wittke,
Piet Engelke,
Ilia Polian,
Bernd Becker:
X-Masking During Logic BIST and Its Impact on Defect Coverage.
ITC 2004: 442-451 |
3 | EE | Piet Engelke,
Ilia Polian,
Michel Renovell,
Bharath Seshadri,
Bernd Becker:
The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults.
VTS 2004: 171-178 |
2003 |
2 | EE | Piet Engelke,
Ilia Polian,
Michel Renovell,
Bernd Becker:
Simulating Resistive Bridging and Stuck-At Faults.
ITC 2003: 1051-1059 |
2002 |
1 | EE | Ilia Polian,
Piet Engelke,
Bernd Becker:
Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics.
ISMVL 2002: 216- |