| 2008 |
|---|
| 8 | EE | Stéphane Badel,
Erdem Guleyupoglu,
Ozgur Inac,
Anna Pena Martinez,
Paolo Vietti,
Frank K. Gürkaynak,
Yusuf Leblebici:
A Generic Standard Cell Design Methodology for Differential Circuit Styles.
DATE 2008: 843-848 |
| 2007 |
|---|
| 7 | EE | Francesco Regazzoni,
Stéphane Badel,
Thomas Eisenbarth,
Johann Großschädl,
Axel Poschmann,
Zeynep Toprak Deniz,
Marco Macchetti,
Laura Pozzi,
Christof Paar,
Yusuf Leblebici,
Paolo Ienne:
A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies.
ICSAMOS 2007: 209-214 |
| 6 | EE | Stéphane Badel,
Yusuf Leblebici:
Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage.
ISCAS 2007: 1871-1874 |
| 5 | EE | Ilhan Hatirnaz,
Stéphane Badel,
Nuria Pazos,
Yusuf Leblebici,
Srinivasan Murali,
David Atienza,
Giovanni De Micheli:
Early wire characterization for predictable network-on-chip global interconnects.
SLIP 2007: 57-64 |
| 2006 |
|---|
| 4 | EE | Elizabeth J. Brauer,
Ilhan Hatirnaz,
Stéphane Badel,
Yusuf Leblebici:
Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design.
ISCAS 2006 |
| 3 | EE | Stéphane Badel,
Ilhan Hatirnaz,
Yusuf Leblebici,
Elizabeth J. Brauer:
Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells.
VLSI-SoC 2006: 234-238 |
| 2004 |
|---|
| 2 | | Stéphane Badel,
Alexandre Schmid,
Yusuf Leblebici:
Mixed analog-digital image processing circuit based on Hamming artificial neural network architecture.
ISCAS (5) 2004: 780-783 |
| 2003 |
|---|
| 1 | EE | Stéphane Badel,
Alexandre Schmid,
Yusuf Leblebici:
VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications.
ESANN 2003: 445-450 |
