2008 |
66 | | Sani R. Nassif,
Jaijeet S. Roychowdhury:
2008 International Conference on Computer-Aided Design (ICCAD'08), November 10-13, 2008, San Jose, CA, USA
IEEE 2008 |
65 | EE | Chenjie Gu,
Jaijeet S. Roychowdhury:
An efficient, fully nonlinear, variability-aware non-monte-carlo yield estimation procedure with applications to SRAM cells and ring oscillators.
ASP-DAC 2008: 754-761 |
64 | EE | David Binkley,
Helmut E. Graeb,
Georges G. E. Gielen,
Jaijeet S. Roychowdhury:
From Transistor to PLL - Analogue Design and EDA Methods.
DATE 2008 |
63 | EE | Prateek Bhansali,
Shweta Srivastava,
Xiaolue Lai,
Jaijeet S. Roychowdhury:
Comprehensive procedure for fast and accurate coupled oscillator network simulation.
ICCAD 2008: 815-820 |
62 | EE | Chenjie Gu,
Jaijeet S. Roychowdhury:
Model reduction via projection onto nonlinear manifolds, with applications to analog circuits and biochemical systems.
ICCAD 2008: 85-92 |
61 | EE | Shatam Agarwal,
Jaijeet S. Roychowdhury:
Efficient Multiscale Simulations of Circadian Rhythms Using Automated Phase Macomodelling Techniques.
Pacific Symposium on Biocomputing 2008: 402-413 |
60 | EE | Ting Mei,
Jaijeet S. Roychowdhury:
A Time-Domain Oscillator Envelope Tracking Algorithm Employing Dual Phase Conditions.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 59-69 (2008) |
59 | EE | Ning Dong,
Jaijeet S. Roychowdhury:
General-Purpose Nonlinear Model-Order Reduction Using Piecewise-Polynomial Representations.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 249-264 (2008) |
2007 |
58 | EE | S. Dabas,
Ning Dong,
Jaijeet S. Roychowdhury:
Automated Extraction of Accurate Delay/Timing Macromodels of Digital Gates and Latches using Trajectory Piecewise Methods.
ASP-DAC 2007: 361-366 |
57 | EE | Xiaolue Lai,
Jaijeet S. Roychowdhury:
Advanced tools for simulation and design of oscillators/PLLs.
ASP-DAC 2007: 442-449 |
56 | EE | Shweta Srivastava,
Jaijeet S. Roychowdhury:
Interdependent Latch Setup/Hold Time Characterization via Euler-Newton Curve Tracing on State-Transition Equations.
DAC 2007: 136-141 |
55 | EE | Zhichun Wang,
Xiaolue Lai,
Jaijeet S. Roychowdhury:
PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels.
DAC 2007: 142-147 |
54 | EE | Jaijeet S. Roychowdhury:
Micro-Photonic Interconnects: Characteristics, Possibilities and Limitations.
DAC 2007: 574-575 |
53 | EE | Shweta Srivastava,
Jaijeet S. Roychowdhury:
Rapid and accurate latch characterization via direct Newton solution of setup/hold times.
DATE 2007: 1006-1011 |
52 | EE | Ting Mei,
Jaijeet S. Roychowdhury:
Small-Signal Analysis of Oscillators Using Generalized Multitime Partial Differential Equations.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1054-1069 (2007) |
2006 |
51 | EE | Xiaolue Lai,
Jaijeet S. Roychowdhury:
Fast simulation of large networks of nanotechnological and biochemical oscillators for investigating self-organization phenomena.
ASP-DAC 2006: 273-278 |
50 | EE | Prashant Goyal,
Xiaolue Lai,
Jaijeet S. Roychowdhury:
A fast methodology for first-time-correct design of PLLs using nonlinear phase-domain VCO macromodels.
ASP-DAC 2006: 291-296 |
49 | EE | Xiaolue Lai,
Jaijeet S. Roychowdhury:
Macromodelling oscillators using Krylov-subspace methods.
ASP-DAC 2006: 527-532 |
48 | EE | Xiaolue Lai,
Jaijeet S. Roychowdhury:
A multilevel technique for robust and efficient extraction of phase macromodels of digitally controlled oscillators.
DAC 2006: 1017-1022 |
47 | EE | Ting Mei,
Jaijeet S. Roychowdhury:
A robust envelope following method applicable to both non-autonomous and oscillatory circuits.
DAC 2006: 1029-1034 |
46 | EE | Ting Mei,
Jaijeet S. Roychowdhury:
Efficient AC analysis of oscillators using least-squares methods.
DATE 2006: 263-268 |
45 | EE | Xiaolue Lai,
Jaijeet S. Roychowdhury:
TP-PPV: piecewise nonlinear, time-shifted oscillator macromodel extraction for fast, accurate PLL simulation.
ICCAD 2006: 269-274 |
44 | EE | Ting Mei,
Jaijeet S. Roychowdhury:
PPV-HB: harmonic balance for oscillator/PLL phase macromodels.
ICCAD 2006: 283-288 |
43 | EE | Jaijeet S. Roychowdhury,
Robert C. Melville:
Delivering global DC convergence for large mixed-signal circuits via homotopy/continuation methods.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 66-78 (2006) |
2005 |
42 | EE | Xiaolue Lai,
Yayun Wan,
Jaijeet S. Roychowdhury:
Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycle-slipping due to loop non-idealities and supply noise.
ASP-DAC 2005: 459-464 |
41 | EE | Yayun Wan,
Jaijeet S. Roychowdhury:
Operator-based model-order reduction of linear periodically time-varying systems.
DAC 2005: 391-396 |
40 | EE | Ning Dong,
Jaijeet S. Roychowdhury:
Automated nonlinear Macromodelling of output buffers for high-speed digital applications.
DAC 2005: 51-56 |
39 | | Ting Mei,
Jaijeet S. Roychowdhury:
An efficient and robust technique for tracking amplitude and frequency envelopes in oscillators.
ICCAD 2005: 599-603 |
38 | | Ting Mei,
Jaijeet S. Roychowdhury:
Oscillator-AC: restoring rigour to linearized small-signal analysis of oscillators.
ICCAD 2005: 604-609 |
37 | | Kapil D. Boianapally,
Ting Mei,
Jaijeet S. Roychowdhury:
A multi-harmonic probe technique for computing oscillator steady states.
ICCAD 2005: 610-613 |
36 | EE | Jaijeet S. Roychowdhury:
Exact Analytical Equations for Predicting Nonlinear Phase Errors and Jitter in Ring Oscillators.
VLSI Design 2005: 516-521 |
35 | EE | Sachin S. Sapatnekar,
Jaijeet S. Roychowdhury,
Ramesh Harjani:
High-Speed Interconnect Technology: On-Chip and Off-Chip.
VLSI Design 2005: 7- |
34 | EE | Zhe Wang,
Rajeev Murgai,
Jaijeet S. Roychowdhury:
ADAMIN: automated, accurate macromodeling of digital aggressors for power and ground supply noise prediction.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 56-64 (2005) |
33 | EE | Ting Mei,
Jaijeet S. Roychowdhury,
Todd S. Coffey,
Scott A. Hutchinson,
David M. Day:
Robust, stable time-domain methods for solving MPDEs of fast/slow systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(2): 226-239 (2005) |
2004 |
32 | EE | Praveen Ghanta,
Zheng Li,
Jaijeet S. Roychowdhury:
Analytical expressions for phase noise eigenfunctions of LC oscillators.
ASP-DAC 2004: 175-180 |
31 | EE | Ting Mei,
Jaijeet S. Roychowdhury,
Todd S. Coffey,
Scott A. Hutchinson,
David M. Day:
Robust, stable time-domain methods for solving MPDEs of fast/slow systems.
DAC 2004: 848-853 |
30 | EE | Zhe Wang,
Rajeev Murgai,
Jaijeet S. Roychowdhury:
Automated, Accurate Macromodelling of Digital Aggressors for Power/Ground/Substrate Noise Prediction.
DATE 2004: 824-829 |
29 | EE | Xiaolue Lai,
Jaijeet S. Roychowdhury:
Automated oscillator macromodelling techniques for capturing amplitude variations and injection locking.
ICCAD 2004: 687-694 |
28 | | Zhe Wang,
Rajeev Murgai,
Jaijeet S. Roychowdhury:
Macromodeling of digital libraries for substrate noise analysis.
ISCAS (5) 2004: 516-519 |
27 | EE | Jaijeet S. Roychowdhury:
Algorithmic Macromodelling Methods for Mixed-Signal Systems.
VLSI Design 2004: 141- |
2003 |
26 | EE | Ning Dong,
Jaijeet S. Roychowdhury:
Piecewise polynomial nonlinear model reduction.
DAC 2003: 484-489 |
25 | EE | Alper Demir,
Jaijeet S. Roychowdhury:
A reliable and efficient procedure for oscillator PPV computation, with phase noise macromodeling applications.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(2): 188-197 (2003) |
2002 |
24 | EE | Jaijeet S. Roychowdhury:
A time-domain RF steady-state method for closely spaced tones.
DAC 2002: 510-513 |
23 | EE | Jaijeet S. Roychowdhury:
Making Fourier-envelope simulation robust.
ICCAD 2002: 240-245 |
22 | EE | Jaijeet S. Roychowdhury:
Theory and algorithms for RF sensitivity computation.
ISCAS (5) 2002: 225-228 |
21 | | Jaijeet S. Roychowdhury:
Optical Systems 101 for EDA Practitioners.
IWLS 2002: 397 |
2001 |
20 | EE | Piet Wambacq,
Gerd Vandersteen,
Joel R. Phillips,
Jaijeet S. Roychowdhury,
Wolfgang Eberle,
Baolin Yang,
David E. Long,
Alper Demir:
CAD for RF circuits.
DATE 2001: 520-529 |
19 | EE | Alper Demir,
David E. Long,
Jaijeet S. Roychowdhury:
Computing Phase Noise Eigenfunctions Directly from Harmonic Balance/Shooting Matrices.
VLSI Design 2001: 283- |
2000 |
18 | | Alper Demir,
David E. Long,
Jaijeet S. Roychowdhury:
Computing Phase Noise Eigenfunctions Directly from Steady-State Jacobian Matrices.
ICCAD 2000: 283-288 |
17 | | Laurence Nagel,
Jaijeet S. Roychowdhury:
Computer-aided Design of RF Communication Systems: Techniques and Challenges.
VLSI Design 2000: 6 |
1999 |
16 | EE | Jaijeet S. Roychowdhury:
Reduced-Order Modelling of Time-Varying Systems.
ASP-DAC 1999: 53-56 |
15 | EE | Onuttom Narayan,
Jaijeet S. Roychowdhury:
Analysing Forced Oscillators with Multiple Time Scales.
ASP-DAC 1999: 57-60 |
14 | EE | Onuttom Narayan,
Jaijeet S. Roychowdhury:
Multi-Time Simulation of Voltage-Controlled Oscillators.
DAC 1999: 629-634 |
13 | EE | Onuttom Narayan,
Jaijeet S. Roychowdhury:
Analyzing Forced Oscillators with Multiple Time Scales.
VLSI Design 1999: 621- |
1998 |
12 | EE | Alper Demir,
Amit Mehrotra,
Jaijeet S. Roychowdhury:
Phase Noise in Oscillators: A Unifying Theory and Numerical Methods for Characterisation.
DAC 1998: 26-31 |
11 | EE | Al Dunlop,
Alper Demir,
Peter Feldmann,
Sharad Kapur,
David E. Long,
Robert C. Melville,
Jaijeet S. Roychowdhury:
Tools and Methodology for RF IC Design.
DAC 1998: 414-420 |
10 | EE | Jaijeet S. Roychowdhury,
Alper Demir:
Estimating noise in RF systems.
ICCAD 1998: 199-202 |
9 | EE | Jaijeet S. Roychowdhury:
Reduced-order modelling of linear time-varying systems.
ICCAD 1998: 92-95 |
1997 |
8 | EE | Jaijeet S. Roychowdhury:
Efficient Methods for Simulating Highly Nonlinear Multi-Rate Circuits.
DAC 1997: 269-274 |
1996 |
7 | EE | Jaijeet S. Roychowdhury,
Robert C. Melville:
Homotopy Techniques for Obtaining a DC Solution of Large-Scale MOS Circuits.
DAC 1996: 286-291 |
6 | EE | Peter Feldmann,
Jaijeet S. Roychowdhury:
Computation of circuit waveform envelopes using an efficient, matrix-decomposed harmonic balance algorithm.
ICCAD 1996: 295-300 |
5 | EE | Sharad Kapur,
David E. Long,
Jaijeet S. Roychowdhury:
Efficient time-domain simulation of frequency-dependent elements.
ICCAD 1996: 569-573 |
1994 |
4 | EE | Jaijeet S. Roychowdhury,
A. Richard Newton,
Donald O. Pederson:
Algorithms for the transient simulation of lossy interconnect.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(1): 96-104 (1994) |
1992 |
3 | EE | Jaijeet S. Roychowdhury,
A. Richard Newton,
Donald O. Pederson:
Simulating Lossy Interconnect with High Frequency Nonidealities in Linear Time.
DAC 1992: 75-80 |
1991 |
2 | EE | Jaijeet S. Roychowdhury,
Donald O. Pederson:
Efficient Transient Simulation of Lossy Interconnect.
DAC 1991: 740-745 |
1 | | Jaijeet S. Roychowdhury,
A. Richard Newton,
Donald O. Pederson:
An Impulse-Response Based Linear Time-Complexity Algorithm for Lossy Interconnect Simulation.
ICCAD 1991: 62-65 |