2008 |
25 | EE | Arseni Vitkovski,
Georgi Kuzmanov,
Georgi Gaydadjiev:
Memory Organization with Multi-Pattern Parallel Accesses.
DATE 2008: 1420-1425 |
24 | EE | Ricardo Chaves,
Georgi Kuzmanov,
Leonel Sousa,
Stamatis Vassiliadis:
Merged Computation for Whirlpool Hashing.
DATE 2008: 272-275 |
23 | EE | Ricardo Chaves,
Georgi Kuzmanov,
Leonel Sousa:
On-the-fly attestation of reconfigurable hardware.
FPL 2008: 71-76 |
22 | EE | Ricardo Chaves,
Blagomir Donchev,
Georgi Kuzmanov,
Leonel Sousa,
Stamatis Vassiliadis:
BRAM-LUT Tradeoff on a Polymorphic DES Design.
HiPEAC 2008: 55-65 |
21 | EE | Ricardo Chaves,
Georgi Kuzmanov,
Leonel Sousa,
Stamatis Vassiliadis:
Cost-Efficient SHA Hardware Accelerators.
IEEE Trans. VLSI Syst. 16(8): 999-1008 (2008) |
20 | EE | Michael J. Wirthlin,
Daniel S. Poznanovic,
P. Sundararajan,
Alan J. Coppola,
D. Pellerin,
Walid A. Najjar,
R. Bruce,
M. Babst,
O. Pritchard,
Paolo Palazzari,
Georgi Kuzmanov:
OpenFPGA CoreLib core library interoperability effort.
Parallel Computing 34(4-5): 231-244 (2008) |
19 | EE | Michael J. Wirthlin,
Daniel S. Poznanovic,
P. Sundararajan,
Alan J. Coppola,
D. Pellerin,
Walid A. Najjar,
R. Bruce,
M. Babst,
O. Pritchard,
Paolo Palazzari,
Georgi Kuzmanov:
OpenFPGA CoreLib core library interoperability effort.
Parallel Computing 34(4-5): 231-244 (2008) |
2007 |
18 | EE | Koen Bertels,
Georgi Kuzmanov,
Elena Moscu Panainte,
Georgi Gaydadjiev,
Yana Yankova,
Vlad Mihai Sima,
Kamana Sigdel,
Roel Meeuws,
Stamatis Vassiliadis:
HARTES Toolchain Early Evaluation: Profiling, Compilation and HDL Generation.
FPL 2007: 402-408 |
17 | EE | Yana Yankova,
Koen Bertels,
Georgi Kuzmanov,
Georgi Gaydadjiev,
Yi Lu,
Stamatis Vassiliadis:
DWARV: DelftWorkBench Automated Reconfigurable VHDL Generator.
FPL 2007: 697-701 |
2006 |
16 | EE | Stamatis Vassiliadis,
Georgi Kuzmanov,
Stephan Wong,
Elena Moscu Panainte,
Georgi Gaydadjiev,
Koen Bertels,
Dmitry Cheresiz:
PISC: Polymorphic Instruction Set Computers.
ARC 2006: 274-286 |
15 | EE | Ricardo Chaves,
Georgi Kuzmanov,
Leonel Sousa,
Stamatis Vassiliadis:
Improving SHA-2 Hardware Implementations.
CHES 2006: 298-310 |
14 | EE | Sascha Uhrig,
S. Maier,
Georgi Kuzmanov,
Theo Ungerer:
Coupling of a reconfigurable architecture and a multithreaded processor core with integrated real-time scheduling.
IPDPS 2006 |
13 | EE | Ricardo Chaves,
Georgi Kuzmanov,
Stamatis Vassiliadis,
Leonel Sousa:
Reconfigurable memory based AES co-processor.
IPDPS 2006 |
12 | EE | Ricardo Chaves,
Georgi Kuzmanov,
Leonel Sousa,
Stamatis Vassiliadis:
Rescheduling for Optimized SHA-1 Calculation.
SAMOS 2006: 425-434 |
11 | EE | Georgi Kuzmanov,
Georgi Gaydadjiev,
Stamatis Vassiliadis:
Multimedia rectangularly addressable memory.
IEEE Transactions on Multimedia 8(2): 315-322 (2006) |
2005 |
10 | EE | Yong Dou,
Stamatis Vassiliadis,
Georgi Kuzmanov,
G. N. Gaydadjiev:
64-bit floating-point FPGA matrix multiplication.
FPGA 2005: 86-95 |
9 | EE | Georgi Kuzmanov,
Stamatis Vassiliadis,
Jos T. J. van Eijndhoven:
Hardwired MPEG-4 repetitive padding.
IEEE Transactions on Multimedia 7(2): 261-268 (2005) |
2004 |
8 | EE | Georgi Kuzmanov,
Georgi Gaydadjiev,
Stamatis Vassiliadis:
Visual Data Rectangular Memory.
Euro-Par 2004: 760-767 |
7 | EE | Georgi Kuzmanov,
Georgi Gaydadjiev,
Stamatis Vassiliadis:
The MOLEN Processor Prototype.
FCCM 2004: 296-299 |
6 | EE | Georgi Kuzmanov,
Georgi Gaydadjiev,
Stamatis Vassiliadis:
Loading rho-µ-Code: Design Considerations.
SAMOS 2004: 11-19 |
5 | EE | Georgi Kuzmanov,
Georgi Gaydadjiev,
Stamatis Vassiliadis:
The Virtex II ProTM MOLEN Processor.
SAMOS 2004: 192-202 |
4 | EE | Stamatis Vassiliadis,
Stephan Wong,
Georgi Gaydadjiev,
Koen Bertels,
Georgi Kuzmanov,
Elena Moscu Panainte:
The MOLEN Polymorphic Processor.
IEEE Trans. Computers 53(11): 1363-1375 (2004) |
2003 |
3 | EE | Georgi Kuzmanov,
Stamatis Vassiliadis:
Arbitrating Instructions in an pmu-Coded CCM.
FPL 2003: 81-90 |
2002 |
2 | EE | Georgi Kuzmanov,
Stamatis Vassiliadis:
Reconfigurable repetitive padding unit.
ACM Great Lakes Symposium on VLSI 2002: 98-103 |
1 | EE | Georgi Kuzmanov,
Stamatis Vassiliadis,
Jos T. J. van Eijndhoven:
A 2D Addressing Mode for Multimedia Applications.
Embedded Processor Design Challenges 2002: 291-306 |