2009 |
17 | EE | Alexander Fuchs,
Amit Goel,
Jim Grundy,
Sava Krstic,
Cesare Tinelli:
Ground Interpolation for the Theory of Equality.
TACAS 2009: 413-427 |
2008 |
16 | EE | Amit Goel,
Sarma B. K. Vrudhula:
Statistical waveform and current source based standard cell models for accurate timing analysis.
DAC 2008: 227-230 |
15 | EE | Amit Goel,
Sarma B. K. Vrudhula:
Current source based standard cell model for accurate signal integrity and timing analysis.
DATE 2008: 574-579 |
14 | EE | Amit Goel,
Sarma B. K. Vrudhula,
Feroze Taraporevala,
Praveen Ghanta:
A Methodology for Characterization of Large Macro Cells and IP Blocks Considering Process Variations.
ISQED 2008: 200-206 |
13 | EE | Sarvesh Bhardwaj,
Sarma B. K. Vrudhula,
Amit Goel:
A Unified Approach for Full Chip Statistical Timing and Leakage Analysis of Nanoscale Circuits Considering Intradie Process Variations.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1812-1825 (2008) |
2007 |
12 | EE | Sava Krstic,
Amit Goel:
Architecting Solvers for SAT Modulo Theories: Nelson-Oppen with DPLL.
FroCos 2007: 1-27 |
11 | EE | Amit Goel,
Sarvesh Bhardwaj,
Praveen Ghanta,
Sarma B. K. Vrudhula:
Computation of Joint Timing Yield of Sequential Networks Considering Process Variations.
PATMOS 2007: 125-137 |
10 | EE | Sava Krstic,
Amit Goel,
Jim Grundy,
Cesare Tinelli:
Combined Satisfiability Modulo Parametric Theories.
TACAS 2007: 602-617 |
2004 |
9 | EE | Amit Goel,
Randal E. Bryant:
Symbolic Simulation, Model Checking and Abstraction with Partially Ordered Boolean Functional Vectors.
CAV 2004: 255-267 |
8 | EE | Shuvendu K. Lahiri,
Randal E. Bryant,
Amit Goel,
Muralidhar Talupur:
Revisiting Positive Equality.
TACAS 2004: 1-15 |
2003 |
7 | EE | Amit Goel,
Gagan Hasteer,
Randal E. Bryant:
Symbolic representation with ordered function templates.
DAC 2003: 431-435 |
6 | EE | Amit Goel,
Randal E. Bryant:
Set Manipulation with Boolean Functional Vectors for Symbolic Reachability Analysis.
DATE 2003: 10816-10821 |
2002 |
5 | EE | Jin Yang,
Amit Goel:
GSTE through a case study.
ICCAD 2002: 534-541 |
2000 |
4 | EE | Amit Goel,
William R. Lee:
Formal verification of an IBM CoreConnect processor local bus arbiter core.
DAC 2000: 196-200 |
3 | EE | Randal E. Bryant,
Pankaj Chauhan,
Edmund M. Clarke,
Amit Goel:
A Theory of Consistency for Modular Synchronous Systems.
FMCAD 2000: 486-504 |
1999 |
2 | | Amit Goel,
Chuck Baker,
Clifford A. Shaffer,
Bernard Grossman,
Raphael T. Haftka,
William H. Mason,
Layne T. Watson:
VizCraft: A Multidimensional Visualization Tool for Aircraft Configuration Design.
IEEE Visualization 1999: 425-428 |
1 | EE | Amit Goel,
Constantinos Phanouriou,
Frederick A. Kamke,
Calvin J. Ribbens,
Clifford A. Shaffer,
Layne T. Watson:
WBCSim: A Prototype Problem Solving Environment for Wood-Based Composites Simulations.
Eng. Comput. (Lond.) 15(2): 198-210 (1999) |